1978 International Electron Devices Meeting最新文献

{"title":"The evolution of FET technology for VLSI applications","authors":"H.N. Yu, A. Reisman, C. Osburn, D. Critchlow, T. Chang","doi":"10.1109/IEDM.1978.189349","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189349","url":null,"abstract":"An overview of the development of a 1 µm MOSFET technology using electron beam lithography for VLSI applications is described. Various aspects of the technology including device design, threshold stability, reliability studies, dimensional control and performance evaluation will be reviewed briefly. Experimental results based on a device test chip and a circuit test chip will be presented as confirmation of device design and circuit performance in a VLSI chip environment.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122081748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A measurement technique and algorithm for determining the NPN and PNP alphas of a thyristor","authors":"R. Amantea","doi":"10.1109/IEDM.1978.189479","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189479","url":null,"abstract":"A new method has been developed for accurately measuring the forward-blocking characteristics of gate-turn-off (GTO) thyristors, and for converting these characteristics into plots on npn and pnp gain as functions of anode current and anode voltage. Specifically, anode current and gate current are measured as function of gate-to-cathode voltage at a fixed anode voltage over several orders of magnitude of anode current. These data are used to determine the electron and hole components of anode current, which are, in turn, used to calculate αnprand αnpnover the entire range of anode current of interest. Examples are given that show how junction shorts, low minority-carrier lifetime in the n-base, and anomalously low npn gain are diagnosed in gate-turn-off thyristors. These new procedures have successfully diagnosed the causes of gate insensitivity in 95 percent of the devices to which they have been applied.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125472615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A new I2L memory cell - Double diffused base structure","authors":"S. Kato, K. Murakami, M. Ueda, Y. Horiba, T. Nakano","doi":"10.1109/IEDM.1978.189390","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189390","url":null,"abstract":"A new structure of I2L static memory cell is proposed to improve the electrical characteristics. The cell was fabricated by the double diffused base technology. An additional p-type dopant was introduced to the base region of the bit transistor before the usual base diffusion. The downward current gain of the bit transistor has been successfully reduced by increasing the base width without influencing the upward current gain of the flip-flop transistor. As a result, a minimum write pulse width of 40 ns was obtained compared with 100-200 ns in the conventional structure. A static 1K bits I2L RAM, which was developed by introducing the new structure cell, operated at an address access time of 20 ns and a write pulse width of 40 ns with a power dissipation of 350 mW.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130093216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Input and output stations for multilevel storage CCDs","authors":"E. Gottler, O. Gruter","doi":"10.1109/IEDM.1978.189490","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189490","url":null,"abstract":"Problems of multilevel storage in CCDs are the need for high-standard technology as well as for simple and reliable input and output circuitry. This paper reports on novel input and output circuits and on first test results. Some major features of the proposed scheme are: No linear amplifiers, only one reference voltage, no extra clocks, number of charge levels selectable according to technology performance. First test devices showed reliable 3-bit-operation and, in analog mode, detection of 15 out of 16 planned levels.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130316904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Linewidth measurement: From fine art to science","authors":"D. Nyyssonen, J. Jerke","doi":"10.1109/IEDM.1978.189448","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189448","url":null,"abstract":"Traditional methods of linewidth measurement on integrated circuit photomasks and wafers have employed an optical microscope with some type of measuring eyepiece. In recent years, the push to finer line geometries has revealed systematic measurement differences between instruments as large as 1.0 µm. Modeling of linewidth measurement systems has shown that these differences may be attributed to differences in edge detection criteria. New techniques have been developed at the NBS for accurate optical edge detection and calibration of other optical linewidth measurement systems.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130355901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Environmental effects on GaAs MESFETs","authors":"A. Christou, W. Anderson, K. Sleger","doi":"10.1109/IEDM.1978.189435","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189435","url":null,"abstract":"In many anticipated applications, GaAs FET devices and circuits will be subject to adverse environmental conditions. Up until now no performance related data has been reported either for passivated or unpassivated devices. In the present paper, we report on failure modes resulting from high relative humidity and temperature cycling in the presence of ionic contamination in an environmental chamber. MESFETs with (i) gate floating and (2) with gate biased with respect to the source (source grounded and drain floating), were cycled -10°C to 100°C at 95% relative humidity. Four types of MESFET structures with gold and aluminum contact systems have been tested: unpassivated non-hermetic; passivated non-hermetic; passivated hermetic and unpassivated hermetic. The effects of Na and Cl ions, at levels of 1014cm-2, were investigated. Electrical measurementS before and after exposure included DC characterization. RF characterization will be reported at a later time. Devices which exhibited excessive leakage currents were analyzed using the scanning electron microscope, Auger electron spectroscopy, EBIC and X-ray spectroscopy. The results show that passivated non-hermetic, unpassivated non-hermetic and passivated hermetic exhibit all of the following failure modes: a. Corrosion of the metallization resulting from ionic contamination, moisture and the galvanic couple; b. Electrolytic conduction between electrically biased metallizations, where the rate of transfer of metal ions from one electrode to another, across the surface depends upon the electrolytic current flow. The conductivity of the surface is a function of the amount of moisture on the surface. The transfer of metal shows up as a gate to source leakage current resulting from a metal-film developing in the transfer path. The close spacings between gate-source-drain make this failure mechanism highly probable for GaAs FETs. Gate leakage current as a function of number of cycles and ion contamination has also been determined for all commercial devices tested. MESFETs with aluminum gates showed corrosion phenomena. The Au-Al reactions and aluminum corrosion were also present on passivated non-hermetic MESFETs indicating that present passivation utilized (SiO2) is not a barrier to ions and moisture. MESFETs with Au gates exhibited migrative resistive shorts (MGRS). Interdigitated metallization structures with controlled spacings were utilized to determine kinetics of moisture-ion migration and hence determine activation energies. For SiO2passivation the activation energy was determined to be 1.1 eV.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129772633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Ion implanted GaAs power FETs","authors":"A. Immorlica, J. Higgins, W. Hill, G. Robinson, R. Kuvås","doi":"10.1109/IEDM.1978.189430","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189430","url":null,"abstract":"","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117037589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Substrate-fed CMOS memory device","authors":"T. Iizuka","doi":"10.1109/IEDM.1978.189392","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189392","url":null,"abstract":"A novel structure of a negative resistance diode for high density static RAM cell is described. The diode, called Substrate-Fed CMOS (SF-CMOS) diode, consists of weak depletion type p- and n-MOSTs, whose drains are formed in the p-well and n-substrate, respectively. The structure enables supplying a diode current via substrate. Drain currents for the FETs, which operate in the subthreshold region, are controlled by back-gate bias, resulting in a sharp negative resistance with an \"OFF\" current below 1pA. The SF-CMOS diode plus a transfer-gate transistor and a load element make up a memory cell. The feasibility of using a polysilicon resistor, a leaky diode and a MOSFET for the load element is discussed. An eight-by-eight cell array of SF-CMOS cells with MOSFET loads is fabricated and examined. Using a 5µm line width and 3µm spacing design rule, the obtained cell size is 1440µm2, compared with 3000µm2required for a six-transistor cell. A 4096-word by 1-bit static RAM has been designed using SF-CMOS cells. The obtained chip size is as small as 14.9mm2. READ and WRITE operations of the RAM are similar to those of single transistor cells, except that SF-CMOS cells need no refresh operation. A 45 ns access time has been obtained with 5-volt VDD, using computer simulation.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122810127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optical control of IMPATT oscillator dynamics","authors":"R. Kiehl","doi":"10.1109/IEDM.1978.189409","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189409","url":null,"abstract":"The results of detailed computer simulations of the effect of optically generated carriers on the dynamics of an IMPATT diode oscillator are presented. Both small- and large-amplitude oscillations are examined over wide ranges in operating conditions and optical power level. Agreement is obtained between the theoretical results and experimental observations. Key results of the calculations are used to establish the extent to which the amplitude and frequency of a conventional IMPATT oscillator can be optically modulated as well as the operating conditions under which this control is optimized.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123198560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 2K×8-bit static RAM","authors":"T. Ohzone, T. Hirao, K. Tsuji, S. Horiuchi, S. Takayanagi","doi":"10.1109/IEDM.1978.189428","DOIUrl":"https://doi.org/10.1109/IEDM.1978.189428","url":null,"abstract":"High density 2K×8-bit fully static RAM has been developed. Memory cell size of 23×27µm results in the chip size of 3.75×4.19mm, which is nearly equal to that of existing 4K-bit static RAM's. High packing density is realized by layout of 3µm photolithography and double-level polysilicon process permitting fabrication of memory load resistors upon driver MOSFET's.","PeriodicalId":164556,"journal":{"name":"1978 International Electron Devices Meeting","volume":"323 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115226218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}