The evolution of FET technology for VLSI applications

Abstract

An overview of the development of a 1 µm MOSFET technology using electron beam lithography for VLSI applications is described. Various aspects of the technology including device design, threshold stability, reliability studies, dimensional control and performance evaluation will be reviewed briefly. Experimental results based on a device test chip and a circuit test chip will be presented as confirmation of device design and circuit performance in a VLSI chip environment.