Z. Xu, S. Saha, D. Koltsov, A. Richardson, B. Honary, J. Hannu, A. Sutherland, B.G. Moffat, M. Desmulliez
{"title":"Embedded health monitoring strategies for aircraft wiring systems","authors":"Z. Xu, S. Saha, D. Koltsov, A. Richardson, B. Honary, J. Hannu, A. Sutherland, B.G. Moffat, M. Desmulliez","doi":"10.1109/ESTC.2008.4684392","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684392","url":null,"abstract":"Health and usage monitoring of structures and active systems has received a wealth of attention in recent years. Microsystems are seen as a core technology for the realisation of these monitors as they offer the potential for multi-sensor integration with active electronics, wireless connectivity and in the future a self-powering capability. This article focuses on solutions for aircraft wiring systems where on-line detection of degradation and incipient failure would deliver improved safety and enhanced maintenance efficiency. Several approaches are presented to the problem of wire degradation detection in terms of both test and monitoring strategies. Both electric and mechanical (acoustic) methods will be presented together with simulation and experimental results.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115258237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Qiang Wu, N. Lorenz, K. Cannon, Changhai Wang, A. Moore, D. Hand
{"title":"Hermetic joining of micro-devices using a glass frit intermediate layer and a scanning laser beam","authors":"Qiang Wu, N. Lorenz, K. Cannon, Changhai Wang, A. Moore, D. Hand","doi":"10.1109/ESTC.2008.4684431","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684431","url":null,"abstract":"In this paper we investigate and compare a laser-driven joining process with two different illumination conditions: (i) high speed scanning of a focused beam and (ii) reasonably uniform ldquoflood illuminationrdquo of the whole sample. It is shown that the scanning beam not only avoids illuminating the central part of the device, but also provides more uniform heating of the area to be bonded than laser ldquoflood illuminationrdquo. We demonstrate bonding of three different packages: (i) LCC (Leadless chip carrier) packages, (ii) AlN and (iii) LTCC (Low temperature co-fired ceramic) substrates to ldquotop-hatrdquo packages, using a scanned beam from a fibre-delivered high power laser diode array to cure an intermediate layer of glass frit. Standard leak testing demonstrates that all those samples have excellent hermetic sealing with leak rates at the level of 10-9 atmldrcc/s.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115503937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Application of a method for characterization of thermo mechanical stress caused by packaging processes","authors":"S. Majcherek, S. Hirsch","doi":"10.1109/ESTC.2008.4684477","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684477","url":null,"abstract":"This paper reports on a method for the investigation of mechanical stress on MEMS sensor and actuator structures due to packaging processes. A silicon test chip is developed and manufactured to validate the simulation results. Finite element analysis (FEA) is used to optimize the geometric parameters and to find a stress sensitive sensor geometry. A diaphragm structure is used as mechanical amplifier for bulk induced stresses during the packaging process. Piezo resistive solid state resistors are doped into the surface of the chip to measure the stress in the diaphragms and at the contact pads being most significant locations for analysis. A high precision ohmmeter was used to measure the resistance prior and past the packaging process. The captured data allows for computation of the resulting stress loads in magnitude. Therefore, a stress evaluation of different packaging technologies is conducted and the impact of the packaging process on reliability can be estimated immediately.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125049647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Botao Shao, R. Weerasekera, A. T. Woldegiorgis, Li-Rong Zheng, Ran Liu, W. Zapka
{"title":"High frequency characterization and modelling of inkjet printed interconnects on flexible substrate for low-cost RFID applications","authors":"Botao Shao, R. Weerasekera, A. T. Woldegiorgis, Li-Rong Zheng, Ran Liu, W. Zapka","doi":"10.1109/ESTC.2008.4684435","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684435","url":null,"abstract":"This paper presents the characterization and modeling of inkjet printed interconnects on flexible polyimide substrate using nano-particle silver ink for low-cost RFID applications. Then TDR/TDT and S-parameter measurements are performed at high frequency from 30 kHz to 6 GHz. A lumped equivalent circuit and distributed parameter model of the printed interconnects have been developed for the realization of the full printed RFID tags. Additionally the related electrical properties of the printed interconnects are extracted.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"447 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122724404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Intelligent power control using System-On-Chip devices","authors":"G. Chindris, D. Pitica, M. Muresan","doi":"10.1109/ESTC.2008.4684413","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684413","url":null,"abstract":"Nowadays PWM control circuits are usually embedded into a microprocessor or a system-on-chip core. The real improvement for such implementation should come not only from more precise PWM generation or from more complicated control loop algorithms, but also from new added functionalities like: power quality monitoring, new failure and security procedures, design for test and testability features and inter-block communications. The paper proposes an evaluation of perspectives for implementing intelligent power control devices with system-on-chip technology from three points of view: intrinsic functionality - better PWM control for SMPS, testability - embedding test structures into power control topologies and added functionality - extending the system intelligence by improving its capacity to communicate with other systems. The paper will present design principles of such intelligent devices along with experimental results showing key-points of the concept implementation.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123891490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Codreanu, C. Ionescu, P. Svasta, I. Plotog, V. Vulpe
{"title":"Accurate 3D modelling and simulation of advanced packages and vertical stacked dice","authors":"N. Codreanu, C. Ionescu, P. Svasta, I. Plotog, V. Vulpe","doi":"10.1109/ESTC.2008.4684464","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684464","url":null,"abstract":"In previous papers, the authors have investigated planar configurations existing in high-density interconnection (HDI) structures from the electromagnetic and signal integrity viewpoints (using 2.5D field solvers), offering solutions to signal integrity (SI) and electromagnetic compatibility (EMC) concerns . This paper presents new investigations and results focused on 3D modelling and simulation of advanced packages (SIP- system in package, SOP - system on package) and vertical stacked dice. A system-in-a-package or system in package, also known as a chip stack MCM, has a number of integrated circuits enclosed in a single package or module. The SIP performs all or most of the functions of an electronic system. System-on-package (SOP) is the new emerging system technology that goes beyond system-on-chip (SOC) and system-in-package (SIP) and forms the basis of all emerging digital convergent electronic and bio-electronic systems.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123964286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of a gigabit Ethernet Fiber Optic Media Converter module to meet European trend in FTTH architectures","authors":"G. Delrosso, L. Maggi","doi":"10.1109/ESTC.2008.4684423","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684423","url":null,"abstract":"This paper will describe the development of a versatile two-fibers full-duplex 1.25 Gb/s Ethernet fiber optic media converter module where a novel method to couple or extract light into a multimode optical fiber (MMF) avoiding expensive fiber-optic connectors is applied. The coupling principle, based on unusual use of bending loss, is described. Finally the packaging activity for fitting the media converter in standard electrical outlet boxes is also reported.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126203340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wei-ting Chen, Chang-Sheng Chen, Cheng-Hua Tsai, Kuo-Chiang Chin, S. Lai
{"title":"A mobile WiMAX RF front-end module with integrated passive components and novel material","authors":"Wei-ting Chen, Chang-Sheng Chen, Cheng-Hua Tsai, Kuo-Chiang Chin, S. Lai","doi":"10.1109/ESTC.2008.4684346","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684346","url":null,"abstract":"System in package (SiP) plays an important role in the mobile communication market, while it can efficiently improve the size shrinkage, cost-effectiveness and available time of the products. Good achievements have been realized by other works in the past years, such as VCO, PA, BPF, Balun, Bluetooth module, and Wi-Fi systems with embedded passives [1-4]. Nowadays, the current trend is towards personal multi-media applications requiring high transmission data rate and mobility. Therefore, worldwide interoperability for microwave access (WiMAX) communication system is developed to meet the requirements. In this system, the operation of the wide channel bandwidth and the linearity of signals are the critical issue, especially in the circuit designs. This paper describes the design methodology of a RF front-end module with the modelling of embedded passive components that integrates with the power amplifier (PA), RF switch, BPF, and LPF circuit and operates over 2.3 - 2.7 GHz mobile WiMAX system. Additionally, the novel high-permittivity organic material with DK~20.8 at 2.4 GHz was also been developed. It minimizes circuit areas, greatly increases the quality factor of passive components and can be compatible with traditional PCB lamination process to reduce the production cost. By this material and multi-layers substrates realized by PCB process, the embedded passives largely replace SMDs including the inductors, capacitors, and filter components. The final designed embedded RF front-end produces 23 dB gain, better than 10 dB return loss in the TX path; and 2.5 dB noise figure with greater than 11 dB return loss in the RX path. Through the embedded technologies, 10 capacitors, 5 inductors, and 2 filters were embedded into the substrate, occupying almost 70.8 % of the total passive components, and the size of embedded front-end is less than 600 times 600 mil2. These technical results not only promote the technology of SiP but provide the solutions for the broadband mobile communication applications.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130017384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High temperature behaviour and reliability of Al-Ribbon for automotive applications","authors":"E. Milke, T. Mueller","doi":"10.1109/ESTC.2008.4684384","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684384","url":null,"abstract":"Within the last years the bonding wire market is moving to ultra fine wires below 23 mum. Leading edge applications are now using 18 mum in mass production. This tendency is shown and predicted by the annual semiconductor industry roadmaps for IC/ASIC packaging. Special focus is on cost reduction and a continued decreasing of the package size. Contrary, the development in packaging of power devices is heading the opposite way to accommodate larger aluminium wires with multiple stitches. Currently the bonding process of thick aluminium wires is limited to 500 mum in industrial application. However, there is a need for the usage of aluminium wires with larger diameters to fulfil current and future interconnect requirements. In the past recent years aluminium ribbons were developed for power electronics application. Typical dimensions are 2000 times 200 mum or 1000 times 100 mum. In principle an aluminium ribbon offers the same advantages as an aluminium wire. In addition some of the disadvantages of thick wires are eliminated by ribbons. For instance a single 2000 times 200 mum ribbon could replace two 500 mum thick wires and transfer the same current load. A further advantage of a ribbon is the reduced thickness especially for thinner packages. Currently the automotive industry is looking for aluminium ribbon as replacement for aluminium thick wire in the next power electronic device generation. The reliability behaviour of aluminium thick wires is well known for many years whereas the reliability characteristics of ribbons have not yet been intensively investigated. This paper focuses on reliability of aluminium ribbons. Basic material properties for high purity as well as for corrosion resistive aluminium ribbons will be presented. This includes mechanical properties at various temperatures up to 250degC. Initial results for pressure cooker test will be shown. Ribbon bonding characteristics for DCB including high temperature storage test will be described.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129240991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Wilson, A. West, D. Velandia, P. Conway, D. Whalley, L. Quintero, R. Monfared
{"title":"Characterization of printed solder paste excess and bridge related defects","authors":"A. Wilson, A. West, D. Velandia, P. Conway, D. Whalley, L. Quintero, R. Monfared","doi":"10.1109/ESTC.2008.4684543","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684543","url":null,"abstract":"Surface mount technology (SMT) involves the printing of solder paste on to printed circuit board (PCB) interconnection pads prior to component placement and reflow soldering. This paper focuses on the solder paste deposition process. With an approximated cause ratio of 50 - 70% of post assembly defects, solder paste deposition represents the most significant cause initiator of the three sub-processes. Paradigmatic cause models, and associated design rules and effects data are extrapolated from academic and industrial literature and formulated into physical models that identify and integrate the process into three discrete solder paste deposition events - i.e. (i) stencil / PCB alignment, (ii) print stroke / aperture filling and (iii) stencil separation / paste transfer. The projectpsilas industrial partners are producers of safety-critical products and have recognised the in-service reliability benefits of electro-mechanical interface elimination when multiple smaller circuit designs are assimilated into one larger printed circuit assembly (PCA). However, increased solder paste deposition related defect rates have been reported with larger PCAs and therefore, print process physical models need to account for size related phenomena.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130591088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}