印刷锡膏过量及电桥相关缺陷的表征

A. Wilson, A. West, D. Velandia, P. Conway, D. Whalley, L. Quintero, R. Monfared
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引用次数: 9

摘要

表面贴装技术(SMT)涉及在组件放置和回流焊之前将锡膏印刷到印刷电路板(PCB)互连垫上。本文重点研究了锡膏沉积工艺。焊膏沉积是这三个子工艺中最重要的原因,其造成组装后缺陷的原因比例约为50 - 70%。聚合原因模型,以及相关的设计规则和效果数据是从学术和工业文献中推断出来的,并形成物理模型,该模型将该过程识别并整合为三个离散的锡膏沉积事件——即(i)模板/ PCB对齐,(ii)打印行程/孔径填充和(iii)模板分离/粘贴转移。该项目的工业合作伙伴是安全关键产品的生产商,他们已经认识到,当多个较小的电路设计被吸收到一个较大的印刷电路组件(PCA)中时,消除机电接口在使用中的可靠性优势。然而,据报道,较大的pca增加了锡膏沉积相关的缺陷率,因此,打印过程物理模型需要考虑与尺寸相关的现象。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Characterization of printed solder paste excess and bridge related defects
Surface mount technology (SMT) involves the printing of solder paste on to printed circuit board (PCB) interconnection pads prior to component placement and reflow soldering. This paper focuses on the solder paste deposition process. With an approximated cause ratio of 50 - 70% of post assembly defects, solder paste deposition represents the most significant cause initiator of the three sub-processes. Paradigmatic cause models, and associated design rules and effects data are extrapolated from academic and industrial literature and formulated into physical models that identify and integrate the process into three discrete solder paste deposition events - i.e. (i) stencil / PCB alignment, (ii) print stroke / aperture filling and (iii) stencil separation / paste transfer. The projectpsilas industrial partners are producers of safety-critical products and have recognised the in-service reliability benefits of electro-mechanical interface elimination when multiple smaller circuit designs are assimilated into one larger printed circuit assembly (PCA). However, increased solder paste deposition related defect rates have been reported with larger PCAs and therefore, print process physical models need to account for size related phenomena.
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