IEEE Transactions on Components, Packaging and Manufacturing Technology最新文献

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High-Dimensional Uncertainty Quantification Using Stochastic Galerkin and Tensor Decomposition 利用随机伽勒金和张量分解进行高维不确定性量化
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-24 DOI: 10.1109/TCPMT.2024.3418342
Ziyuan Wang;Karanvir S. Sidhu;Roni Khazaka
{"title":"High-Dimensional Uncertainty Quantification Using Stochastic Galerkin and Tensor Decomposition","authors":"Ziyuan Wang;Karanvir S. Sidhu;Roni Khazaka","doi":"10.1109/TCPMT.2024.3418342","DOIUrl":"10.1109/TCPMT.2024.3418342","url":null,"abstract":"This article investigates the application of tensor decomposition and the stochastic Galerkin method for the uncertainty quantification of complex systems characterized by high parameter dimensionality. By employing these methods, we construct surrogate models aimed at efficiently predicting system output uncertainty. The effectiveness of our approaches is demonstrated through a comparative analysis of accuracy and central processing unit (CPU) cost with conventional Galerkin methods, using two transmission line circuit examples with up to 25 parameters.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced Anti-Oxidation Copper-Based Conductive Inks for Low Porosity Copper Films in Power Electronics 用于电力电子器件低孔隙率铜膜的增强型抗氧化铜基导电油墨
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-20 DOI: 10.1109/TCPMT.2024.3417261
Mingming Yi;Wenhui Zhu;Ping Wu;Yiou Qiu;Guoliao Sun;Liancheng Wang
{"title":"Enhanced Anti-Oxidation Copper-Based Conductive Inks for Low Porosity Copper Films in Power Electronics","authors":"Mingming Yi;Wenhui Zhu;Ping Wu;Yiou Qiu;Guoliao Sun;Liancheng Wang","doi":"10.1109/TCPMT.2024.3417261","DOIUrl":"10.1109/TCPMT.2024.3417261","url":null,"abstract":"Copper-based conductive inks have been extensively researched due to their low sintering temperature and high anti-oxidation properties for various electrical devices. However, the unstable oxidation properties of copper (Cu) limit its practical application. The existing anti-oxidation methods adopted in copper sintering often reduce copper strength and reliability. Therefore, the study presents a novel copper composite ink comprising copper precursors, copper microparticles, organic protective agents, and antioxidants. The sintering process is simple, requiring only 20 min at \u0000<inline-formula> <tex-math>$300~^{circ }$ </tex-math></inline-formula>\u0000C in nitrogen without any additional pressure. As a result, sintered copper with an oxidation rate of only 3.21 wt% was successfully obtained using the mixed ink of copper particles and precursors. The porosity of the sintered copper is 10.69%, which is a 71.77% reduction compared to the copper sintered by using pure copper precursor ink, due to the synergistic effect. Furthermore, the study discusses and analyzes the lattice growth mechanism and synergy mechanism of copper particles and their precursors during copper sintering.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141524845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Hard Constraint and Domain-Decomposition- Based Physics-Informed Neural Network Framework for Nonhomogeneous Transient Thermal Analysis 基于硬约束和域分解的非均质瞬态热分析物理信息神经网络框架
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-19 DOI: 10.1109/TCPMT.2024.3416523
Zengkai Wu;Li Jun Jiang;Sheng Sun;Ping Li
{"title":"A Hard Constraint and Domain-Decomposition- Based Physics-Informed Neural Network Framework for Nonhomogeneous Transient Thermal Analysis","authors":"Zengkai Wu;Li Jun Jiang;Sheng Sun;Ping Li","doi":"10.1109/TCPMT.2024.3416523","DOIUrl":"10.1109/TCPMT.2024.3416523","url":null,"abstract":"In this article, a hard constraint (HC) and domain-decomposition-based physics-informed neural network (HCD-PINN) framework is introduced for nonhomogeneous transient thermal analysis. In general, physics-informed neural network (PINN) uses a global neural network to approximate the solutions of partial differential equations (PDEs), and its performance could decrease dramatically when the problem becomes big or complex. To get this deficiency addressed and simultaneously enhance the modeling capability of PINN, in this work, the domain decomposition method (DDM)-based strategy is introduced. In each subdomain, an independent neural network is used to approximate the solution. Thereby, the size and complexity of the neutral network are reduced. To facilitate effective integration of solutions across different regions, an HC method is proposed for automatic satisfaction of interface conditions between adjacent subdomains. At the interface, continuity conditions for temperature and heat flux are considered, with heat flux continuity expressed in terms of the derivative of temperature. Using the mixed residual method (MIM), continuity conditions at the interface can be transformed into a linear form of the neural network outputs. This eliminates the need for differentiation, enabling automatic satisfaction of conditions through the use of a predefined HC matrix. Ultimately, we merge neural networks responsible for subdomains and interfaces, along with the HC matrix, using a differentiable distance function. This integration establishes a cohesive and unified framework. To validate the efficiency and accuracy of HCD-PINN, several numerical examples are studied and compared with previous PINN methods, with COMSOL simulations as exact solutions. The experimental results demonstrate the superior accuracy of our proposed method.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Void Growth and Intermetallic Bridging in Microscale Solder Interconnects Under Thermal Annealing 热退火条件下微米尺度焊料互连器件中的空洞增长和金属间搭桥
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-19 DOI: 10.1109/TCPMT.2024.3416430
Sudarshan Prasanna Prasad;Chetan Jois;Yuvraj Singh;Ganesh Subbarayan;Bharat Penmecha;Prasanna Raghavan
{"title":"Void Growth and Intermetallic Bridging in Microscale Solder Interconnects Under Thermal Annealing","authors":"Sudarshan Prasanna Prasad;Chetan Jois;Yuvraj Singh;Ganesh Subbarayan;Bharat Penmecha;Prasanna Raghavan","doi":"10.1109/TCPMT.2024.3416430","DOIUrl":"10.1109/TCPMT.2024.3416430","url":null,"abstract":"As the pitch and size of microbumps in 2.5-D/ 3-D packages decrease, void evolution in the solder joint volume accompanied by growth of Cu-Sn intermetallic (IMC) phase is a potential reliability concern necessitating further investigation into the underlying mechanisms. In this study, test devices are designed and fabricated to mimic the behavior of fine pitch microbumps of size \u0000<inline-formula> <tex-math>$30~mu $ </tex-math></inline-formula>\u0000m. These test devices offer the capability of nondestructively observing IMC growth and void evolution. Consequently, they allow continuous observation of phase evolution. These devices also eliminate potential loss of information due to destructive processing techniques. Each fabricated test device consists of multiple Cu-Sn-Cu joints with varying sizes of Sn solder segments that are then aged at \u0000<inline-formula> <tex-math>$175~ {mathrm {^{circ}C }}$ </tex-math></inline-formula>\u0000 for a total time of 1000 h, with readouts every 50 or 100 h under scanning electron microscope (SEM). Additionally, trenches are milled in some samples using focused ion beam (FIB) to characterize the various material phases at the Cu-Sn junctions and monitor their growth with thermal aging. The observations from these investigations are reported, and a reaction-diffusion mechanism is proposed to explain the observed Cu-Sn IMC and void evolution due to thermal aging at elevated temperatures.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141939182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impacts of Pressure on the Stability of Chip Stack Structures in the Presence of Noncoplanar Cu Pillars 非共面铜柱存在时压力对芯片堆栈结构稳定性的影响
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-18 DOI: 10.1109/TCPMT.2024.3416108
Yu Li;Li Liu;Meng Ruan;Zhengzhi Wang;Sheng Liu;Zhiwen Chen
{"title":"Impacts of Pressure on the Stability of Chip Stack Structures in the Presence of Noncoplanar Cu Pillars","authors":"Yu Li;Li Liu;Meng Ruan;Zhengzhi Wang;Sheng Liu;Zhiwen Chen","doi":"10.1109/TCPMT.2024.3416108","DOIUrl":"10.1109/TCPMT.2024.3416108","url":null,"abstract":"Cu-Cu bonding is widely used in 3-D stacking for chip interconnection. However, noncoplanarity of Cu pillars can significantly influence the reliability of the stacked chips. In this work, the impacts of bonding pressures on chip stacking with noncoplanar Cu pillars were investigated through finite element modeling and molecular dynamics (MDs) simulations. From finite element modeling, the maximum residual stress in the TSV was located in the bottom Cu pillar furthest from the center of the chip and increased with bonding pressure. It was also found that the overall warpage increased linearly with the number of chip layers initially and then stabilized when Cu pillars were noncoplanar. The linear increase rate raised with higher bonding pressure. Based on MDs simulations, the thickness of bonding layer in the shorter pillar increased continuously with bonding time and pressure. In contrast, the thickness in standard pillars grew over time and eventually stabilized. During this, the bonding pressure posed negligible effects on the bonding layer thickness in standard pillars, and dislocations were generally concentrated near the bonding layer, serving as channels for Cu atom diffusion into the bonding layer.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141939183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Life Cycle Assessment (LCA) and Multicriteria Decision Making (MCDM): An Evaluation of Encapsulants for Power Electronics Packaging 生命周期评估 (LCA) 和多标准决策 (MCDM):电力电子封装用封装材料评估
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-13 DOI: 10.1109/TCPMT.2024.3413723
Jiaxuan Wang;Pan Liu
{"title":"Life Cycle Assessment (LCA) and Multicriteria Decision Making (MCDM): An Evaluation of Encapsulants for Power Electronics Packaging","authors":"Jiaxuan Wang;Pan Liu","doi":"10.1109/TCPMT.2024.3413723","DOIUrl":"10.1109/TCPMT.2024.3413723","url":null,"abstract":"With the development of power electronics, there is an increasing demand for high-temperature packaging materials, especially for encapsulants such as calcium aluminate, phosphate cement-based materials (CEs), etc. Therefore, environmental impact analysis for such novel encapsulants becomes necessary. In this article, four encapsulation materials were first evaluated through life cycle assessment (LCA) for environmental impact, including three polymer-based materials, namely epoxy (EP) resin, polyurethane (PU), and silicone gel (SG) and a novel calcium aluminate CE, with the utilization of software Simapro and the method ReCiPe2016. The LCA revealed that CE emerged as the most environmentally friendly option, followed by EP, PU, and SG. The results of LCA, together with six other criteria, namely maximum operating temperature, coefficient of thermal expansion (CTE), thermal conductivity (TC), volume resistivity (R\u0000<inline-formula> <tex-math>$_{mathrm {V}}$ </tex-math></inline-formula>\u0000), viscosity, and costs, were further taken into account for a multicriteria decision making (MCDM) calculation for suitability. With the analytic hierarchy process (AHP) weighting method and the technique of order preference similarity to the ideal solution (TOPSIS) evaluation method applied, the MCDM results presented the preference ranking order of the encapsulants which was CE, EP, PU, SG. According to the findings from LCA and MCDM, CE received an outstanding evaluation result, which indicates its great potential as an encapsulation material for power electronics packaging.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of Thermal and Mechanical Stresses on Novel Microstrip Lines Printed on Flexible Substrates 热应力和机械应力对印刷在柔性基底上的新型微带线的影响
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-11 DOI: 10.1109/TCPMT.2024.3412740
Abdullah S. Obeidat;Emuobosan Enakerakpo;Ashraf Umar;Waleed Al-Shaibani;Mohamed Abdelatty;Sara Lieberman;Olya Noruz Shamsian;Riadh Al-Haidari;Mohammed Alhendi;Mark D. Poliks
{"title":"Effect of Thermal and Mechanical Stresses on Novel Microstrip Lines Printed on Flexible Substrates","authors":"Abdullah S. Obeidat;Emuobosan Enakerakpo;Ashraf Umar;Waleed Al-Shaibani;Mohamed Abdelatty;Sara Lieberman;Olya Noruz Shamsian;Riadh Al-Haidari;Mohammed Alhendi;Mark D. Poliks","doi":"10.1109/TCPMT.2024.3412740","DOIUrl":"10.1109/TCPMT.2024.3412740","url":null,"abstract":"Direct writing methods created a revolution in the electronic industry due to their lower cost, fast processing, and lower wasted material. Microstrip line is an important electronic component that transfers the signal and the foundation for the communication between multiple components in any circuit board. Therefore, studying its electromechanical behavior against thermal and mechanical stresses is necessary for real-life applications. In this research, novel microstrip lines were printed on “polyethylene terephthalate” (PET) and “polyimide” (PI) flexible substrates using an aerosol jet printer (AJP) and dispensing system (DS). An advanced posttreatment technique was used to enhance the conductivity of the microstrip lines printed on low glass transition flexible PET substrate. Different microstrip line designs with various mesh ground planes were tested under mild and harsh mechanical bending and different environmental conditions and their losses were characterized. The results showed that the photonic curing enhanced the microstrip lines conductivity by 65% compared to the convectional curing. The in situ resistance measurements during harsh bending demonstrated conclusively that the robustness of the printed microstrip lines increased as the filling percentage of the ground plane became lower. The aging at \u0000<inline-formula> <tex-math>$85~^{circ }$ </tex-math></inline-formula>\u0000C/85% RH had a significantly stronger effect on the microstrip lines conductivity compared to the aging at \u0000<inline-formula> <tex-math>$85~^{circ }$ </tex-math></inline-formula>\u0000C without humidity due to the changes in the printed ink’s microstructure and the increment in ionic conductivity. Thermal aging led to a reduction in the microstrip line’s ductility and the cracking became easier in the microstructure of the printed films. The resistance of a sample aged at \u0000<inline-formula> <tex-math>$85~^{circ }$ </tex-math></inline-formula>\u0000C increased by 81.7% after 10000 bending cycles compared to only 20.5% for a sample without thermal aging. Such findings provide important guidelines for those designing flexible hybrid electronics and for manufacturers who seek the assurance of these technologies for both maturing and reliable products.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
TC-GVF: Tensor Core GPU based Vector Fitting via Accelerated Tall-Skinny QR Solvers TC-GVF:通过加速高瘦QR求解器实现基于张量核心GPU的矢量拟合
IF 2.2 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-11 DOI: 10.1109/tcpmt.2024.3410298
Vinay Kukutla, Ramachandra Achar, Wai Kong Lee
{"title":"TC-GVF: Tensor Core GPU based Vector Fitting via Accelerated Tall-Skinny QR Solvers","authors":"Vinay Kukutla, Ramachandra Achar, Wai Kong Lee","doi":"10.1109/tcpmt.2024.3410298","DOIUrl":"https://doi.org/10.1109/tcpmt.2024.3410298","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.2,"publicationDate":"2024-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analytical Solutions for Transient Thermal Spreading Resistance of a 3-D Flux Channel 三维流道瞬态热扩散阻力的分析解决方案
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-11 DOI: 10.1109/TCPMT.2024.3412794
Belal Al-Khamaiseh;Yuri S. Muzychka
{"title":"Analytical Solutions for Transient Thermal Spreading Resistance of a 3-D Flux Channel","authors":"Belal Al-Khamaiseh;Yuri S. Muzychka","doi":"10.1109/TCPMT.2024.3412794","DOIUrl":"10.1109/TCPMT.2024.3412794","url":null,"abstract":"In microelectronic devices, the moment a high-power current is transmitted into the system, heat is simultaneously generated, and the thermal field keeps developing until it reaches a steady-state field after a period of time. In this work, transient analytical solutions for the temperature field and thermal resistance of a rectangular 3-D flux channel are obtained. The flux channel is assumed to have a small heat source on the top surface, whereas convective effects are considered on the bottom surface and lateral edges. The time-dependent solutions are presented explicitly as infinite Fourier series forms. In addition, the solutions are also presented in dimensionless forms as generalized solutions. Moreover, an existing, well-established simple model that represents the profile of the transient thermal spreading resistance for a semi-infinite flux tube is used to verify the presented forms of the analytical solutions, and the results compare very well when considering a flux channel of large thickness. Further, the solutions are used to study the behavior of temperature and thermal resistance over time for some dimensional and nondimensional problems.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reflection Phase Shifter Topology With 180° Tuning Range Using Impedance Transforming Coupler and Series Resonant Load for K-Band Phased Arrays 利用 K 波段相控阵的阻抗变换耦合器和串联谐振负载实现 180° 调谐范围的反射移相器拓扑结构
IF 2.3 3区 工程技术
IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-06-06 DOI: 10.1109/TCPMT.2024.3410181
Haoyu Zhou;Lei Guo;Christophe Fumeaux;Amin Abbosh
{"title":"Reflection Phase Shifter Topology With 180° Tuning Range Using Impedance Transforming Coupler and Series Resonant Load for K-Band Phased Arrays","authors":"Haoyu Zhou;Lei Guo;Christophe Fumeaux;Amin Abbosh","doi":"10.1109/TCPMT.2024.3410181","DOIUrl":"10.1109/TCPMT.2024.3410181","url":null,"abstract":"A reflection phase shifter topology that simultaneously provides a large continuous phase tuning range and low insertion loss is presented for application in emerging low Earth orbit (LEO) satellite communications (SATCOMs) systems. An impedance-transforming coupler and a series-resonant load are used in the proposed circuit structure to achieve 180° phase tuning range while maintaining an insertion loss below 2-dB. To validate the design concept, two prototypes operating from 19.5 to 20.5 GHz are fabricated and tested. The first prototype uses stepped impedance loads to create an effective inductance in the series-resonant load. This prototype achieves a tunable phase tuning range of 183° with ±0.9° phase imbalance and an insertion loss below 1.6-dB with 0.3-dB variation across the entire operating band assuming a 15-dB return loss as the reference. To enhance scalability, short-circuit stubs are used in the second prototype to replace the stepped impedance loads to make the phase shifter less vulnerable to fabrication tolerances at the cost of a slight degradation in the performance. The simplicity of the proposed design, the low insertion loss, and the flatness of the phase and amplitude across the band and tunable phase conditions are the main features of the presented devices compared with other relevant designs.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141939057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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