{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Society Information","authors":"","doi":"10.1109/TCPMT.2025.3553729","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3553729","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 4","pages":"C3-C3"},"PeriodicalIF":2.3,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964035","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143824557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors","authors":"","doi":"10.1109/TCPMT.2025.3553727","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3553727","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 4","pages":"884-884"},"PeriodicalIF":2.3,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964062","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143824565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Publication Information","authors":"","doi":"10.1109/TCPMT.2025.3553725","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3553725","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 4","pages":"C2-C2"},"PeriodicalIF":2.3,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964063","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143820334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Aleksandr A. Vlasov;Topi Uusitalo;Evgenii Lepukhov;Jukka Viheriälä;Mircea Guina
{"title":"Optical Setup for Laser-Assisted Bonding With Through-Silicon Microscopy Capabilities","authors":"Aleksandr A. Vlasov;Topi Uusitalo;Evgenii Lepukhov;Jukka Viheriälä;Mircea Guina","doi":"10.1109/TCPMT.2025.3557118","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3557118","url":null,"abstract":"The modern processes for photonic integration impose stringent demands on the design and functionality of high precision bonding assembly setups. In this study, we present the development of a laser-assisted bonding (LAB) setup employing bottom irradiation/illumination architectures. The main goal is to demonstrate through-silicon imaging capability enabling alignment of photonic waveguides during the LAB process. The imaging is achieved with a novel optical set-up used also for the simultaneous irradiation laser beam delivery. A proof-of-concept LAB integration of a III/V chip to silicon photonic (SiPh) integrated circuit is demonstrated.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"885-893"},"PeriodicalIF":2.3,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10947525","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Unified Microwave Terahertz Waveguide Coupler for Multiband Wireless Applications","authors":"Jie Deng;Pascal Burasa;Ke Wu","doi":"10.1109/TCPMT.2025.3556594","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3556594","url":null,"abstract":"In this work, a microwave (MW) and terahertz (THz) composite waveguide coupler for multiband wireless systems is proposed and demonstrated. Such a very large frequency ratio (more than <inline-formula> <tex-math>$20times $ </tex-math></inline-formula>) of the proposed coupler is made possible thanks to a composite waveguide technique where the center strip of a coplanar waveguide (CPW) is replaced by a substrate-integrated waveguide (SIW) block. In this way, the dual-mode operation, i.e., quasi-TEM mode and TE<sub>10</sub> mode, can be enabled simultaneously at different frequencies. In addition, by adjusting the SIW width, the operating frequency of the quasi-TEM mode and the TE<sub>10</sub> mode can be reassigned. All the advantages known for CPW couplers and SIW couplers are inherited in the proposed waveguide coupler. To validate this scheme, experimental prototypes are developed and fabricated on a thin-film miniature hybrid MW-integrated circuit (MHMIC) process. Measured results confirm the good THz performance as well as MW performance.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"1032-1043"},"PeriodicalIF":2.3,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Broadband Antenna With Folded Structure and Packaged Solar Cell","authors":"Wenxing An;Chenxi Liu;Kai Han;Yi Wu;Yu Luo","doi":"10.1109/TCPMT.2025.3554580","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3554580","url":null,"abstract":"A broadband folded antenna with horizontal and vertical structures is proposed for 2G/3G/4G/5G sub-6-GHz applications. With the packaging process, two solar cells are mounted on the horizontal structure to replace the metallic patch for green communications. Due to the limitation of the regular shape of the solar cell, the existing unidirectional designs have achieved a bandwidth of 60.5% with solar cells for radiation directly. Compared with previous work, this design proposes a folded structure for solar cell antennas to increase the design flexibility. This multiresonant structure with horizontal and vertical parts can stimulate high-order mode to enhance the broadband performance. Furthermore, this folded design can manipulate the current distribution for stable radiation performance. The measured −10-dB band is from 1.7 to 3.85 GHz with a relative bandwidth of 77.4%. Unidirectional patterns are obtained with a peak gain of 5.96 dBi. Solar cells cover 55% of the top area for energy self-sufficiency. With the capacity for photovoltaic power generation, this dual-function device would be a competitive candidate for future low-carbon communications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"1052-1059"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Xueliang Wang;Shuo Feng;Tao Luo;Jinyuan Zhang;Yaqian Zhang;Zhen Cui;Xuejun Fan;Guoqi Zhang;Jiajie Fan
{"title":"Accelerated Life Test and Prediction of Electromigration in Aluminum Interconnects Coupling Multiphysics Full Coupled Model With Optimized Atomic Flux Divergence Simulation","authors":"Xueliang Wang;Shuo Feng;Tao Luo;Jinyuan Zhang;Yaqian Zhang;Zhen Cui;Xuejun Fan;Guoqi Zhang;Jiajie Fan","doi":"10.1109/TCPMT.2025.3554259","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3554259","url":null,"abstract":"With the miniaturization and high-power requirements of microelectronic devices, the current density carried by interconnects in packaging structures continually increases and reaches the threshold of electromigration (EM) failure. In this study, we investigated the microstructure evolution and void formation in aluminum (Al) interconnects during EM at three different current densities (1/3/5 MA/cm<sup>2</sup>) and proposed a method coupling the fully coupled theory with an optimized atomic flux divergence method. The results show as follows. First, for the interconnects in integrated circuits, current density is the main factor affecting the EM lifetime of the interconnects in a certain temperature range. With the gradual increase of current density, the contribution of thermal transfer on EM cannot be ignored. The atomic concentration gradient and stress gradient can inhibit EM failure. Second, the increase of length and the decrease of width of interconnect will lead to the increase of atomic flux inside the structure, resulting in the accumulation of voids and atoms. Third, the structure is dynamically reconstructed after deleting the atoms below the failure threshold and the simulation results agree well with the experimental results. Compared with the traditional atomic flux divergence method, the improved atomic flux divergence method based on the fully coupled theory can better fit the change trend of atomic concentration after interconnect failure, and the failure time error is reduced by about 10%.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"949-958"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tao Tang;Runlin Zhang;Maged A. Aldhaeebi;Thamer S. Almoneef
{"title":"Self-Packaged Compact Filter Array: Innovations Based on Modified Substrate Integrated Suspension Line Technology","authors":"Tao Tang;Runlin Zhang;Maged A. Aldhaeebi;Thamer S. Almoneef","doi":"10.1109/TCPMT.2025.3554181","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3554181","url":null,"abstract":"This article introduces a novel approach to designing a self-packaged filter array by integrating two bandpass filters (BPFs) onto a substrate integrated suspended line (SISL) platform. The innovative topology employed in this design establishes individual air cavities for each filter circuit, created by layering multiple substrate layers and packaging them with grounded substrates at both ends. All filter input and output ports are situated on the bottom ground plane and are connected to their respective ports via metal pins and a multilayer substrate. To address impedance-matching challenges and mitigate parasitic effects resulting from the metal pin connections, strategic impedance-matching techniques are implemented at the pin-to-microstrip line junctions. Furthermore, vertical interconnect access (VIA) structures are strategically positioned around the periphery of the air cavities, linking the ground planes of all substrate layers. This design innovation reduces the number of air cavities by two compared to conventional SISL structures, effectively minimizing volume and shortening connection pin lengths, thereby simplifying the impedance-matching process. The design achieves a quad-flat no-leads (QFN) packaging style by encapsulating each filter circuit with a multilayer substrate containing ground planes, VIAs, and top and bottom ground layers. Validation of the proposed packaging design concept is conducted experimentally through the measurement of two BPFs, with results indicating that the proposed packaging mode enhances filter performance, particularly in terms of reducing losses.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"1025-1031"},"PeriodicalIF":2.3,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vinicius C. Do Nascimento;Seunghyun Hwang;Michael Joseph Smith;Tejas Kulkarni;Qiang Qiu;Cheng-Kok Koh;Ganesh Subbarayan;Dan Jiao
{"title":"Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration","authors":"Vinicius C. Do Nascimento;Seunghyun Hwang;Michael Joseph Smith;Tejas Kulkarni;Qiang Qiu;Cheng-Kok Koh;Ganesh Subbarayan;Dan Jiao","doi":"10.1109/TCPMT.2025.3553840","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3553840","url":null,"abstract":"The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. The accuracy and efficiency of the proposed optimization method are demonstrated in the floorplanning of chiplets on an interposer subject to thermal constraints, and by comparisons against ML-assisted SA-CBL for performing the same task.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"959-973"},"PeriodicalIF":2.3,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143929789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors","authors":"","doi":"10.1109/TCPMT.2025.3546007","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3546007","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 3","pages":"631-631"},"PeriodicalIF":2.3,"publicationDate":"2025-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10935769","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}