IEEE Transactions on Components, Packaging and Manufacturing Technology最新文献

IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors

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IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-03-20 DOI: 10.1109/TCPMT.2025.3546007

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IEEE Transactions on Components, Packaging and Manufacturing Technology Society Information

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-03-20 DOI: 10.1109/TCPMT.2025.3546009

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IEEE Transactions on Components, Packaging and Manufacturing Technology Publication Information

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-03-20 DOI: 10.1109/TCPMT.2025.3546005

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IEEE Transactions on Components, Packaging and Manufacturing Technology Society Information

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-19 DOI: 10.1109/TCPMT.2025.3533109

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IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors IEEE 《部件、封装和制造技术》期刊为作者提供的信息

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IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-19 DOI: 10.1109/TCPMT.2025.3533107

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IEEE Transactions on Components, Packaging and Manufacturing Technology Publication Information

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-19 DOI: 10.1109/TCPMT.2025.3533105

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Study on Effect of Microstructure Evolution on Wafer Warpage for High-Temperature Annealed and Self-Annealed Copper Thin Films

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-10 DOI: 10.1109/TCPMT.2025.3540216

Prashant Kumar Singh;Maik Mueller;Holm Geisler;Michael Hecker;Meiqi Yu;Dirk Breuer;Kashi Vishwanath Machani;Karsten Meier;Frank Kuechenmeister;Karlheinz Bock

{"title":"Study on Effect of Microstructure Evolution on Wafer Warpage for High-Temperature Annealed and Self-Annealed Copper Thin Films","authors":"Prashant Kumar Singh;Maik Mueller;Holm Geisler;Michael Hecker;Meiqi Yu;Dirk Breuer;Kashi Vishwanath Machani;Karsten Meier;Frank Kuechenmeister;Karlheinz Bock","doi":"10.1109/TCPMT.2025.3540216","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3540216","url":null,"abstract":"Copper is widely used as an interconnect material in the back-end-of-line (BEoL) because it has high electrical conductivity and good electromigration failure resistance. Different applications, however, require a large number of ultrathick copper metal interconnects with varied line widths. A high wafer warpage is induced in the wafer due to the coefficient of thermal expansion (CTE) mismatch between the copper and the silicon during the BEoL process steps. High-temperature annealing and self-annealing of copper after deposition also result in high wafer warpage during fabrication. In this work, blanket copper thin films, and high-temperature annealed copper damascene interconnects with varied cross sections were investigated for their textural and microstructural evolution. The investigations show the directional changes of texture and grain size of copper cross sections at different annealing conditions. In addition, measurements also show variation in roughness and hardness magnitude for copper cross sections at different annealing conditions. In the case of blanket copper films, measurements confirmed the self-annealing behavior of copper within 48 h after deposition. In order to analyze a relationship between the stress state of the wafer and the microstructural evolution, the wafer warpage was measured after each BEoL process step. Through this investigation, it was found that the nonhomogenous stress concentrations with different cross sections are an important parameter for understanding the warpage change after high-temperature annealing processes. This study, moreover, gives insights into the structural change of the material during different annealing processes.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 3","pages":"576-590"},"PeriodicalIF":2.3,"publicationDate":"2025-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Facilitating Small-Pitch Interconnects With Low-Temperature Solid-Liquid Interdiffusion Bonding

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-10 DOI: 10.1109/TCPMT.2025.3540665

O. Golim;V. Vuorinen;M. Paulasto-Kröckel

{"title":"Facilitating Small-Pitch Interconnects With Low-Temperature Solid-Liquid Interdiffusion Bonding","authors":"O. Golim;V. Vuorinen;M. Paulasto-Kröckel","doi":"10.1109/TCPMT.2025.3540665","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3540665","url":null,"abstract":"The trend for 3-D heterogeneous integration drives the need for a low-temperature bonding process for high-density interconnects (HDIs). The Cu-Sn–In-based solid-liquid interdiffusion (SLID) is a promising option as a low-temperature bonding technique that offers better processing flexibility and relatively lower costs for chip-sized substrates when compared with hybrid bonding. In this letter, the low-temperature process was applied in a chip-to-chip bonding process. The test structures contain microbumps with 5-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m width and 15-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m pitch, mimicking state-of-the-art small-pitch interconnects. At the bonding temperature of 170°C, the process was completed within 5 min, while at 150°C extended bonding time was required to completely transform low-melting materials into intermetallic phases. Electrical characterization, performed using three test structures, estimated a single interconnect resistivity as low as 1.3e<inline-formula> <tex-math>$^{-7}~Omega $ </tex-math></inline-formula>m. This letter showcases the potential of the low-temperature SLID bond process for HDI applications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 3","pages":"627-630"},"PeriodicalIF":2.3,"publicationDate":"2025-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10879407","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Transferring Fine-Pitch Cu Nanoparticle Bumps for Low-Temperature Cu-Cu Bonding in Chip-Scale Integration

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-07 DOI: 10.1109/TCPMT.2025.3540019

Shuaiqi Wang;Guisheng Zou;Rongbao Du;Lei Liu

{"title":"Transferring Fine-Pitch Cu Nanoparticle Bumps for Low-Temperature Cu-Cu Bonding in Chip-Scale Integration","authors":"Shuaiqi Wang;Guisheng Zou;Rongbao Du;Lei Liu","doi":"10.1109/TCPMT.2025.3540019","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3540019","url":null,"abstract":"Cu-Cu bonding using nanomaterials as an intermediate has attracted increasing attention for its eased requirements for bonding temperature and surface roughness. In this work, we developed a novel low-temperature Cu-Cu bonding technique using transferable Cu nanoparticle bumps. These nanoparticle bumps were first fabricated on donor substrate through pulsed laser deposition (PLD) and then transferred to the target chip by low-temperature pre-sintering (<inline-formula> <tex-math>$160~^{circ }$ </tex-math></inline-formula>C). The conventional dry transfer method using Si donor substrate was proved less feasible since the Cu-O–Si bond formed between Cu nanoparticles and SiO2 natural oxide layer on Si surface could cause transfer failure. An alternative wet transfer approach using Al as a sacrificial layer was proposed, wherein Al was dissolved by KOH solution and nanoparticle bumps were subsequently transferred. The self-release characteristic of wet transfer ensured a higher transfer yield. Transferred nanoparticle bumps on target chip maintained sintering activity and could realize reliable die shear strength (37.4 MPa) with target substrate at <inline-formula> <tex-math>$200~^{circ }$ </tex-math></inline-formula>C, 15 MPa, and 5 min. The electrical resistance of sintered Cu joints showed negligible change before and after transfer. Joint strength decreased to 27.3 MPa due to oxidation after a thermal shock test (TST) (−65 to <inline-formula> <tex-math>$150~^{circ }$ </tex-math></inline-formula>C) for 500 cycles. The transfer strategy could enable a more flexible application of nanomaterials for all-Cu interconnection in chip-scale integration.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 3","pages":"444-453"},"PeriodicalIF":2.3,"publicationDate":"2025-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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High-Density Solenoid Inductor With Magnetic Film for Enhanced Performance in Silicon Interposer

IF 2.3 3区工程技术

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-02-07 DOI: 10.1109/TCPMT.2025.3539720

Ziyu Liu;Junhao Wang;Xiaoshi Zeng;Lin Chen;Na Yan;Qingqing Sun;Yabin Sun;David Wei Zhang

{"title":"High-Density Solenoid Inductor With Magnetic Film for Enhanced Performance in Silicon Interposer","authors":"Ziyu Liu;Junhao Wang;Xiaoshi Zeng;Lin Chen;Na Yan;Qingqing Sun;Yabin Sun;David Wei Zhang","doi":"10.1109/TCPMT.2025.3539720","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3539720","url":null,"abstract":"The 3-D inductor based on through silicon via (TSV) has been studied in the recent years due to its high density of integration and small footprint area. However, the TSV-based inductor suffers from a low-quality factor and small inductance density, owing to the severe loss in the silicon substrate at higher operating frequencies. This article proposes a novel 3-D inductor based on TSV with a core structure of magnetic film, which can improve the quality factor and inductance obviously. This article first optimizes the effect of controlling factors on the performance of conventional TSV-based inductor, including the length and radius of TSV, pitch between two loops, distance between grounding wire and TSV, dielectric liner [silicon dioxide (SiO2)] thickness, the number of turns, and the physical parameters of interconnect. Then, the effect of core physical parameters, dielectric constant, and thickness of magnetic film on the quality factor and inductance are revealed by the electromagnetic simulation. The novel inductor with optimized parameters and film-covered core structure can obtain a quality factor of 27.8 and a density of 115 nH/mm2, which has an improvement of 70% compared to the conventional inductor. Meanwhile, this article proposes a simple and compact physics-based model for the proposed inductor with high accuracy, which makes it easy to evaluate and optimize the performance of inductor. Finally, the conventional TSV-based inductors are fabricated to verify the accuracy of simulation results, and the errors between test results and electromagnetic simulation results are less than 5%.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 3","pages":"436-443"},"PeriodicalIF":2.3,"publicationDate":"2025-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143667535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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