Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'最新文献_第2页

Optimization of solder paste printability with laser inspection technique 用激光检测技术优化锡膏的可印刷性

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526187

T. Okura, M. Kanai, S. Ogata, T. Takei, H. Takakusagi

{"title":"Optimization of solder paste printability with laser inspection technique","authors":"T. Okura, M. Kanai, S. Ogata, T. Takei, H. Takakusagi","doi":"10.1109/IEMT.1995.526187","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526187","url":null,"abstract":"This paper describes an evaluation technique for solder paste printability using a solder paste inspection system and optimization of printing parameters. In a Surface Mount Assembly (SMA), it is very important to evaluate printability of solder paste precisely, because printability of solder paste directly influences reflow soldering quality. We established quite reliable inspection criteria for print quantity of solder paste. So it was found that about 90% of reflow soldering defects could be reduced by prevention of printing defects. Furthermore, since package types have been varied in a SMA, high soldering quality demands stable printability for all patterns. This paper presents a printability evaluation adopted procedure based on the quality engineering (TAGUCHI method). As a result of optimizing squeegee shape and printer condition by this evaluation method, printability was improved better than 20% in the production process. And optimization of solder paste and stencil added to printer condition resulted in good printability for 0.3 mm pitch patterns on the optimum condition.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114578635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 23

Manufacturing ownership through process re-engineering 通过流程再造实现制造所有权

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526091

J. Stobaugh, A. Rosentrater

引用次数: 0

Model-based product quantity control 基于模型的产品数量控制

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526192

V. Ramakrishnan, D. Walker

引用次数: 2

Electrical and mechanical studies of MCM-D interconnect structure MCM-D互连结构的电气和机械研究

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526100

F. Chao, R. Wu, M. Pecht

引用次数: 1

Alternative facility layouts for semiconductor wafer fabrication facilities 半导体晶圆制造设施的备选设施布局

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526191

R. Hase, R. Uzsoy, C. Takoudis

引用次数: 25

A simple and reproducible method towards fabricating defect-free and reliable solder joints 一种制造无缺陷和可靠焊点的简单和可重复的方法

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526188

D. Xie, Y. Chan, J. Lai

{"title":"A simple and reproducible method towards fabricating defect-free and reliable solder joints","authors":"D. Xie, Y. Chan, J. Lai","doi":"10.1109/IEMT.1995.526188","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526188","url":null,"abstract":"This paper describes a simple and reproducible method to obtain defect-free and reliable solder joints. That is to split the solder joints fabricated from an infrared (IR) reflow soldering process. The characteristics of split solder joints have been critically studied. It is found that the method of splitting is effective in eliminating pore formation (both gas and shrinkage pores) and inclusions in solder joints. The method is applicable to various solder pastes whether it be no-clean or water-soluble. Thermal and mechanical fatigue cycling tests show that fatigue life of the solder joints can be prolonged by more than 60% as compared to that without splitting. Fractographs illustrate that the fractured section in the fatigued joints occurs quite often at the interfaces of printed circuit board (PCB) and copper pads after splitting has been applied to the joints. This strongly testifies the solder portion has been strengthened by splitting. The proposed method is specially suitable for specimens with large pad area in each joint or where the pores or inclusions most likely appear.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129873700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Automated inspection of solder joints-a neural network approach 焊点的自动检测——神经网络方法

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526120

V. Sankaran, B. Chartrand, D.L.H. Lillard, M. Embrechts, R. Kraft

引用次数: 15

LSM vision gage R&R study LSM视觉测量器R&R研究

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526194

W. S. Messina, L.G. Willey, K. W. Jones

引用次数: 1

Development of 0.5 mm thick small outline packages 开发0.5毫米厚的小轮廓包

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526179

Y. Song, Seung-Ho Ahn, S. Oh

引用次数: 0

The experience of lead users in the adoption of minienvironment technology 主要用户采用微型环境技术的经验

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526126

M. Rappa

{"title":"The experience of lead users in the adoption of minienvironment technology","authors":"M. Rappa","doi":"10.1109/IEMT.1995.526126","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526126","url":null,"abstract":"During the past few years, the use of minienvironment technology has rapidly emerged as an important strategy for containing cost and reducing particle contamination in semiconductor integrated circuit fabrication. However, implementation of minienvironment technology is not uniform throughout the semiconductor industry and, in particular, several well-recognized leading firms have been slow to adopt the technology. This paper discusses the experiences of several lead users of minienvironment technology based on data collected from interviews and an industry-wide survey. Generally speaking, lead users have found the technology to be quite beneficial on a number of important dimensions, including cost and contamination control. The experiences and perceptions of lead users provide a contrast to firms that have studied the technology closely, but do not have much actual experience using minienvironments. Lead users report significant cost savings and sub-Class 1 at the wafer surface, while non-users usually perceive far less benefit, particularly in terms of cost. One indication of the effectiveness of the technology is that many lead users continue to expand their investments in minienvironments. The author argues that, compared to industry leaders, lead users of minienvironments may provide greater insight into the usefulness of the technology because these firms are further along the learning curve.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134024841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0