Alternative facility layouts for semiconductor wafer fabrication facilities

Abstract

Examines the performance of several different cellular and functional layouts using simulation models of the different facility designs. The performance measure of interest is the mean time in system or cycle time of lots. Our results show that the presence of unreliable machinery causes the performance of cellular layouts to deteriorate, while the presence of significant setup times improves their performance relative to other layouts. The results also indicate that a very modest amount of additional capacity at critical workcenters results in significant improvements in the performance of functional layouts.