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Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'最新文献

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Laser-diode based soldering system with vision capabilities 基于激光二极管的焊接系统，具有视觉功能
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526182
P. Laferrière, A. Fukumoto
{"title":"Laser-diode based soldering system with vision capabilities","authors":"P. Laferrière, A. Fukumoto","doi":"10.1109/IEMT.1995.526182","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526182","url":null,"abstract":"Describes the design and construction of an experimental prototype laser soldering workstation. The key components of this system are a 15-watt fiber-coupled laser diode array, and a PC vision system. The vision system is used for alignment of the part to be soldered and for observation of the laser-induced reflow. First, the paper describes the major components of the prototype soldering workstation. Second, additional details concerning the optical system for laser beam delivery, imaging, and illumination are given. Next, results of soldering with the laser diode system are presented along with practical recommendations for the overall process. Finally, some possible methods for feedback control of the soldering parameters using image data are mentioned.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"158 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127121806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Temperature accelerated life test (ALT) at the circuit board level 电路板级温度加速寿命试验(ALT)
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526108
C.R. Yang, J.T. Kim
{"title":"Temperature accelerated life test (ALT) at the circuit board level","authors":"C.R. Yang, J.T. Kim","doi":"10.1109/IEMT.1995.526108","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526108","url":null,"abstract":"The purpose of ALT (Accelerated life test) lies in evaluating the failure rate of an item by obtaining expedient information on the lifetest distribution of a material or product by applying stress levels more severe than those specified by standard conditions, in order to greatly reduce the time needed to observe stress reactions or to magnify such reactions within a given time frame so as to ultimately reduce the time, cost, and effort required to evaluate the item. It is not difficult to determine the failure rate at the component level using ALT. However failure rate prediction at the circuit board level is difficult with ALT, because various electrical parameters at the component level have to be taken into account, and determination of accelerated factors is not so easy. This paper describes temperature ALT conducted for the purpose of estimating failure rates and analyzing forms of failure during operation at the circuit board level of a telecommunication system. In this method, a temperature higher than the operational temperature of an item was applied to it in order to generate failure rate data within a short period of time to estimate the failure rate during actual system operation. We proposed systematically the test temperature, test duration, and the sample size for high temperature ALT of the circuit board of a telecommunication system.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127174184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Contamination control using production test data 使用生产测试数据进行污染控制
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526095
Young-Jun Kwon, D. Walker
{"title":"Contamination control using production test data","authors":"Young-Jun Kwon, D. Walker","doi":"10.1109/IEMT.1995.526095","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526095","url":null,"abstract":"This paper presents a methodology to identify suspect process steps during ramp and maturity of an IC fabrication line by utilizing the production functional testing results and to generate a defect Pareto to prioritize defect contamination control.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127499784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Designing response surface model based Run by Run controllers: a new approach 基于Run - by - Run控制器的响应面模型设计:一种新方法
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526117
J. Baras, N. Patel
{"title":"Designing response surface model based Run by Run controllers: a new approach","authors":"J. Baras, N. Patel","doi":"10.1109/IEMT.1995.526117","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526117","url":null,"abstract":"This paper presents a framework for carrying out robust Run by Run (RbR) control via a set-theoretic approach. In particular the RbR controller developed tries to minimize the worst case performance of the plant. This gives us a methodology to handle uncertainty. An interesting consequence of using the set valued approach is that now we can relax the assumptions made on the statistics of the noise. Hence, we can also deal with non-Gaussian and correlated noise. We provide results comparing the performance of the controller to a recursive least squares based controller.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125896645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Batchless factory concept for very short cycle time semiconductor manufacturing 无批量工厂的概念，非常短的周期时间半导体制造
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526208
T. Stanley
{"title":"Batchless factory concept for very short cycle time semiconductor manufacturing","authors":"T. Stanley","doi":"10.1109/IEMT.1995.526208","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526208","url":null,"abstract":"The focus of this paper is a processing concept that moves the thermal processing steps out of the semiconductor fabrication facility, dramatically simplifying the front end of line processing and facilitating single wafer processing to potentially achieve a very short manufacturing process cycle time. In the batchless factory concept wafers would be preprocessed before entering the semiconductor fab by growing gate oxide over the surface of the wafer followed by a blanket poly-silicon gate deposition. Then, through the use of trench or field shield isolation, complementary MOS transistors could be built, isolated and integrated without the need to grow isolation or gate oxides.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125421561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Utilizing production data to increase factory capacity 利用生产数据提高工厂产能
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526176
J. Konopka, W. Trybula
{"title":"Utilizing production data to increase factory capacity","authors":"J. Konopka, W. Trybula","doi":"10.1109/IEMT.1995.526176","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526176","url":null,"abstract":"The amount of data that is captured by any semiconductor manufacturing shop floor control system is massive. Unfortunately, much of the production data that is collected is rarely used. One way to determine a factory's capacity is to determine the capacity of the factory's bottleneck tools. If the capacity of the bottleneck tools can be increased, then the factory's capacity will also increase. This paper demonstrates how production and equipment state data that is usually collected can be used to determine where factory bottleneck tools are. Further investigation of this data with a productivity analysis framework called CUBES will identify and prioritize productivity inefficiencies with their accompanying tool capacity increases. This analysis, when implemented across the manufacturing line, should increase factory capacity.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121876976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Area bonding conductive epoxy adhesives for low cost grid array chip carriers 低成本栅极阵列芯片载体用区域粘合导电环氧胶粘剂
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526198
J.C. Bolger, J. Czarnowski
{"title":"Area bonding conductive epoxy adhesives for low cost grid array chip carriers","authors":"J.C. Bolger, J. Czarnowski","doi":"10.1109/IEMT.1995.526198","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526198","url":null,"abstract":"This paper describes a new type of Z axis epoxy film adhesive, called a_rea b_onding c_onductive (ABC) epoxies, to replace solder and solder balls for surface mounting grid array chip carriers. The ABC adhesives are made by a low cost screen printing process, starting from customer-supplied artwork, so that the conductive epoxy regions are located only at the desired bond pad locations. Reliability data, presented for plastic and LTCC packages attached to FR-4 boards with these adhesives, show better resistance to thermal cycling and thermal shock than soldered packages. This paper also describes a new low cost copper lidded pad array chip carrier, called a Cu-PAC. This uses an ABC epoxy for die and for substrate attach. The Cu-PACs have the potential for major cost savings, size reduction and improved heat removal compared to present molded plastic grid array packages.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128302964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Development of design for manufacture 为制造进行设计开发
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526202
W. Trybula, J. Konopka
{"title":"Development of design for manufacture","authors":"W. Trybula, J. Konopka","doi":"10.1109/IEMT.1995.526202","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526202","url":null,"abstract":"The development of term \"Design for Manufacture\" dates back to the late 1970s when Boothroyd and Dewhurst developed a methodology for evaluating the assembly of mechanical structures. In 1984, General Electric's Center of Excellence in Electronics developed a computerized approach to evaluating electronics board level assembly called \"Manufacturability Rating System\" (MRS). The beginnings of the Design for Manufacture have seen many different attempts to provide a tool for specific purposes, but have not witnessed a total systems approach. During the 1980s and 1990s, terms like Design for Test, Design for the Environment, and Design for X have appeared as methodologies for solving the problem of making designs more compatible with manufacturing. This paper considers the direction of early Design for Manufacture tools and their impact on the development of tools that evaluate the entire product stream and address the total product cycle.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123896565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Soldering on gold plated substrates-solder joint reliability and integrity of surface components 镀金基板上的焊接-表面元件焊点的可靠性和完整性
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526189
J. R. Ganasan
{"title":"Soldering on gold plated substrates-solder joint reliability and integrity of surface components","authors":"J. R. Ganasan","doi":"10.1109/IEMT.1995.526189","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526189","url":null,"abstract":"With the tendency towards smaller printed circuit sizes in the manufacturing industry, the number of components per square area on the PCB increases. With this component increase, tight tolerances come into play, and the requirement for gold plating on PCB tracks and pads then becomes a necessity in order for tolerances to be met and for the ease of solderability. The use of gold rather than tin-lead in tight tolerances is common as the plating of gold over copper tracks and pads offers better control over that of conventional tin-lead plating. Soldering of surface mount components to this gold plated substrate thus becomes a requirement. With the dissolution of gold as an impurity in the liquidus solder forming a tin-gold intermetallic compound, the joint integrity and ductility are severely affected. It is therefore critical that an understanding and control of this dissolution of gold in an eutectic solder joint is achieved.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116470232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Measurements of thermal conductivity and specific heat of lead free solder 无铅焊料导热系数和比热的测量
Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526123
J. Lloyd, Chao Zhang, H. Tan, D. Shangguan, A. Achari
{"title":"Measurements of thermal conductivity and specific heat of lead free solder","authors":"J. Lloyd, Chao Zhang, H. Tan, D. Shangguan, A. Achari","doi":"10.1109/IEMT.1995.526123","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526123","url":null,"abstract":"Thermal processes in the manufacture of solder joints are critical to the production of high quality electronic packaging. Thermal conductivity, thermal diffusivity and volumetric heat capacity are thermophysical properties of solder material that control the thermal aspects of the soldering process. As lead based solder materials are targeted for elimination from electronics manufacture, the need to understand the thermal properties of the new attachment materials to be used are critical for quality control as well as for energy consumption and environmental impact of the manufacturing process. Lead free solder materials are expected to be the predominant attachment material in the near future.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126255185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
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