{"title":"使用生产测试数据进行污染控制","authors":"Young-Jun Kwon, D. Walker","doi":"10.1109/IEMT.1995.526095","DOIUrl":null,"url":null,"abstract":"This paper presents a methodology to identify suspect process steps during ramp and maturity of an IC fabrication line by utilizing the production functional testing results and to generate a defect Pareto to prioritize defect contamination control.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Contamination control using production test data\",\"authors\":\"Young-Jun Kwon, D. Walker\",\"doi\":\"10.1109/IEMT.1995.526095\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a methodology to identify suspect process steps during ramp and maturity of an IC fabrication line by utilizing the production functional testing results and to generate a defect Pareto to prioritize defect contamination control.\",\"PeriodicalId\":123707,\"journal\":{\"name\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1995.526095\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1995.526095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a methodology to identify suspect process steps during ramp and maturity of an IC fabrication line by utilizing the production functional testing results and to generate a defect Pareto to prioritize defect contamination control.