{"title":"Real time in-situ data acquisition using autonomous on-wafer sensor arrays","authors":"M. Freed, M. Kruger, K. Poolla, C. Spanos","doi":"10.1109/ISSM.2000.993624","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993624","url":null,"abstract":"We explore the feasibility of integrating in-situ sensors onto the surface of a silicon wafer, with the objective of placing this wafer into a processing tool to obtain real time measurements. This technique has numerous benefits: increased measurement speed, reduced sensor introduction cost, and increased spatial and temporal information Various sensors and sensor wafers have been developed and tested in a variety of processing tools. Repeatable, real time measurements in harsh environments such as high temperature and plasma have been obtained.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124203788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Stable flow gas delivery system for low pressure liquefied gases","authors":"H. Takagi, M. Ino, M. Tabata, Y. Nishikawa","doi":"10.1109/ISSM.2000.993694","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993694","url":null,"abstract":"This paper describes the possibility to supply the low vapor pressure liquefied gas at stable pressure and relatively high flow rate by a system called all vapor phase gas delivery system, together with evaluation test results using WF/sub 6/ and BCl/sub 3/.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124741007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ken-ichi Mitsumori, H. Nobuaki, N. Takahashi, T. Imaoka, T. Ohmi
{"title":"Advanced wet cleaning using novel nozzle and functional ultrapure water in next generation FPD/LSI manufacturing","authors":"Ken-ichi Mitsumori, H. Nobuaki, N. Takahashi, T. Imaoka, T. Ohmi","doi":"10.1109/ISSM.2000.993680","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993680","url":null,"abstract":"The advanced wet cleaning method relates to the fluid feed nozzle with ultrasonics that is employed for removing contaminants from the surfaces of the substrates during processes for manufacturing LCD or ULSI. In this method, the pressure among feeding and discharging cleaning solution and ambient air is balanced. This balance causes to feed adequate thickness of cleaning solution to remove particles from the substrate and to discharge waste solution and removed particles. The cleaning solution consumption of this method is less than 1/10 of conventional shower type nozzle with ultrasonic that has been popular in LCD fabrications. We named the nozzle using this method \"balanced push-pull nozzle\" (BPP-nozzle). The BPP-nozzle with ultrasonics and hydrogen-dissolved ultrapure water can remove PSL particles from above 30000 to about 100 in the Si-wafer cleaning.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115953264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Watanabe, H. Nishiyama, M. Noguchi, D. Fujiki, K. Nemoto
{"title":"Real-time dark field size measurement method for yield impact evaluation","authors":"K. Watanabe, H. Nishiyama, M. Noguchi, D. Fujiki, K. Nemoto","doi":"10.1109/ISSM.2000.993668","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993668","url":null,"abstract":"A practical method for in-line particle size measurement called real-time dark field size measurement has been developed. Size measurement data possessing a good correlation coefficient (R/sup 2/=0.7) by this method has been acquired using high-sensitivity dark field laser-scanning inspection tools. As a result, it is possible to evaluate yield impact properly even with high-sensitivity dark field laser-scanning inspection tools.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122479612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"TYM system: an integrated tool for inherent line yield improvements for entire fab","authors":"C. Aloni","doi":"10.1109/ISSM.2000.993657","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993657","url":null,"abstract":"Total line yield management (TYM) is a new concept that analyzes the wafer loss all over the fab and transforms the data elements to an effective knowledge base for smart uses. TYM system enables dramatic cost saving. The TYM system is the effective way for achieving 99% factory line yield. A factory with excellent performance achieves line yield results of approx. 94%. A comparison between total line yield management (TYM) verses the traditional line yield management emphasis the huge enhancement. In terms of direct cost that was wasted in 300-mm, the contribution could be more than $19.322 million. In terms of marketing loss the penalty is much higher. Excellent fabs will save money and less effective fabs the line yield improvement will help survivability.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123218888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Achieving stretched capacity goal through integrated engineering and manufacturing excellence","authors":"R.S.T. Kwooi","doi":"10.1109/ISSM.2000.993695","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993695","url":null,"abstract":"Achieving stretched equipment capacity and high productivity in high volume manufacturing is a gritty challenge to drive down cost continuously in this competitive chipset market. With unprecedented volume ramp of both key products in Q4'99, the Test Module faced a shortage of two to four testers. Driving through working group, a refurbishment process was achieved successfully resulting in 60% reduction of tester faults thus improving mean time between failure (MTBF) from 140 hrs to 160 hrs. With the implementation of improved pogo pins at Tester Interface Unit (TIU) and test head had improved cleaning frequency from 5 k to 90 k, one-sum test yield from 88.7% to 97.5% and reduced non-genuine SBL from 10% to less than 3% consistently.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129676697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reflow of AlCu into Vias during CVD TiN barrier deposition","authors":"A. Oliva, A. El-Sayed, A. Griffin, C. Montgomery","doi":"10.1109/ISSM.2000.993702","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993702","url":null,"abstract":"A novel Via failure mechanism for a 0.35 /spl mu/m technology is analyzed in this work. Failure analysis of the failed Vias reveal an anomalous layer at the bottom of the Via hole. Electron diffraction spectra (EDS) of this layer confirms that the main component is AlCu with clusters of titanium aluminide; fluorine is also detected. The root cause of this failure was AlCu extrusion into the Via during the preheat step prior to CVD TiN deposition. It was also found that an improved Ti barrier step coverage can reduce the occurrence of Al extrusions.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"118 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120820594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Yield model with redundancy based on critical area calculations","authors":"K. Mitsutake, Y. Ushiku","doi":"10.1109/ISSM.2000.993645","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993645","url":null,"abstract":"To optimize the redundancy design, the yield model with redundancy is proposed. In this model the accurate number of redundancies to repair one fault is taken into consideration. The calculated yield with redundancy by using this model and the real one are in good agreement. As a result of the application for several redundancy designs, a guide to obtain higher yield is presented.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126728120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Research and development of production control information system tool","authors":"Y. Ishii, S. Watanabe","doi":"10.1109/ISSM.2000.993685","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993685","url":null,"abstract":"It is necessary to obtain some types of information in real time to follow a production plan. To select necessary information, we created a production control business flow. As a result, we found out that there were two types of information that were necessary for production control. The information of first type is that of the difference between each planned stage move and actual stage move. As shown by the business flow, it is important to check the difference between the planned move and the actual move in real time and take quick action. The information of the second type is that of the causes of such difference, especially status information of the constraint equipment. We have established and operated a system that enables us to obtain such types of information and to take quick action to reduce the difference before the problem becomes serious.","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127782675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Doong, Binson Shen, S. Hsieh, Sheng-che Lin, Calvin Hsu
{"title":"The role of test structures for yield enhancement and yield ramp-up: an example of adoptive yield enhancement (AYE): n/sup +//p-well junction leakage enhanced the abnormal leakage current of NMOS's parasitic NPN-BJT","authors":"K. Doong, Binson Shen, S. Hsieh, Sheng-che Lin, Calvin Hsu","doi":"10.1109/ISSM.2000.993663","DOIUrl":"https://doi.org/10.1109/ISSM.2000.993663","url":null,"abstract":"The yield loss of an 0.25 /spl mu/m SRAM caused by the n/sup +//p-well junction leakage was characterized and categorized in two areas by physical location: one is located at the gate/drain region, the other is at the corner of shallow trench isolation. For timely and efficient solving and monitoring of the fabrication line, two sets of test structures and corresponding measurement methods were designed for process monitoring and yield screening. Finally, based on the yield learning, we propose a test-structure-based process control and yield monitoring, called Adoptive Yield Enhancement (AYE).","PeriodicalId":104122,"journal":{"name":"Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121589968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}