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Transistor delay analysis and effective channel velocity extraction in AlGaN/GaN HFETs AlGaN/GaN hfet晶体管延迟分析及有效通道速度提取
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175931
C. Bolognesi, A.C. Kwan, D. Disanto
{"title":"Transistor delay analysis and effective channel velocity extraction in AlGaN/GaN HFETs","authors":"C. Bolognesi, A.C. Kwan, D. Disanto","doi":"10.1109/IEDM.2002.1175931","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175931","url":null,"abstract":"Performed a thorough transistor delay analysis on 0.2 /spl mu/m AlGaN/GaN HFETs implemented on sapphire substrates to identify the various contributions to the total transistor delay 1/2/spl pi/f/sub T/ = /spl tau//sub T/ as a function of gate-drain separation L/sub GD/. We found that the main delay component depends linearly upon the total access resistance of the source and drain regions determined from 'COLDFET' S-parameter measurements, indicating the contribution of extrinsic regions to the transistor delay cannot be neglected for AlGaN/GaN HFETs. Stripping the masking effects of the R/sub S/ and R/sub D/ series resistances reveals an effective channel velocity of /spl sim/3.3 /spl times/ 10/sup 7/ cm/s which is much higher than the values of 1.2-1.3 /spl times/ 10/sup 7/ cm/s generally inferred from f/sub T/ data, but in excellent agreement with predictions from Monte Carlo transport simulations. We also show that process-specific details for devices fabricated on the same epitaxial layers affect the f/sub T/(L/sub GD/) dependence.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"71 1","pages":"685-688"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84923274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A new model of time evolution of gate leakage current after soft breakdown in ultra-thin gate oxides 超薄栅极氧化物软击穿后栅漏电流时间演化的新模型
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175802
T. Hosoi, P. L. Lo Re, Y. Kamakura, K. Taniguchi
{"title":"A new model of time evolution of gate leakage current after soft breakdown in ultra-thin gate oxides","authors":"T. Hosoi, P. L. Lo Re, Y. Kamakura, K. Taniguchi","doi":"10.1109/IEDM.2002.1175802","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175802","url":null,"abstract":"The post-SBD degradation of ultra-thin gate oxides is investigated by means of experiments, theoretical modeling, and computer simulations. The gate leakage current after SBD increases gradually, and is finally limited by the parasitic resistance. A newly developed model shows that the gate leakage increase of post-SBD MOSFETs even under operating conditions causes a significant impact on LSIs in terms of the power consumption.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"116 1","pages":"155-158"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87334728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 42
High mobility p-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric 高迁移率p沟道锗mosfet与薄氧化氮化锗栅极电介质
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175873
H. Shang, H. Okorn-Schmidt, K. Chan, M. Copel, J. Ott, P. Kozłowski, S. Steen, S. Cordes, H.-S.P. Wong, E. Jones, W. Haensch
{"title":"High mobility p-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric","authors":"H. Shang, H. Okorn-Schmidt, K. Chan, M. Copel, J. Ott, P. Kozłowski, S. Steen, S. Cordes, H.-S.P. Wong, E. Jones, W. Haensch","doi":"10.1109/IEDM.2002.1175873","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175873","url":null,"abstract":"We report Ge p-channel MOSFETs with a thin gate stack of Ge oxynitride and LTO on bulk Ge substrate without a Si cap layer. Excellent device characteristics (IV and CV) are achieved with subthreshold slope 82mV/dec. /spl sim/40% hole mobility enhancement is obtained over the Si control with a thermal SiO/sub 2/ gate dielectric. To our knowledge, this is the first demonstration of Ge MOSFETs with less than 10nm thick gate dielectric and less than 100mV/dec subthreshold slope.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"129 1","pages":"441-444"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75499397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 127
Strained silicon MOSFET technology 应变硅MOSFET技术
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175770
J. Hoyt, H. Nayfeh, S. Eguchi, I. Åberg, Guangrui Xia, T. Drake, Eugene A. Fitzgerald, D. Antoniadis
{"title":"Strained silicon MOSFET technology","authors":"J. Hoyt, H. Nayfeh, S. Eguchi, I. Åberg, Guangrui Xia, T. Drake, Eugene A. Fitzgerald, D. Antoniadis","doi":"10.1109/IEDM.2002.1175770","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175770","url":null,"abstract":"Mobility and current drive improvements associated with biaxial tensile stress in Si n- and p-MOSFETs are briefly reviewed. Electron mobility enhancements at high channel doping (up to 6 /spl times/ 10/sup 18/ cm/sup -3/) are characterized in strained Si n-MOSFETs. For low inversion layer carrier concentrations, channel-dopant ionized impurity scattering does reduce the strain-induced mobility enhancement, but the enhancement is recovered at higher inversion charge concentrations, where screening is efficient. Mobility enhancement in strained Si p-MOSFETs is also discussed. There are process integration challenges and opportunities associated with this technology. Dopant diffusion, and its impact on profile engineering in strained Si CMOS structures, is one example. While the slower diffusion of B in Si/sub 1-x/Ge/sub x/ enables improved doping profile control, the diffusivity of the n-type dopants is dramatically enhanced in Si/sub 0.8/Ge/sub 0.2/.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"4 1","pages":"23-26"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91339203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 242
Biomolecular optoelectronic devices and their application to artificial sight 生物分子光电器件及其在人工视觉中的应用
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175888
E. Greenbaum, M. Humayun, T. Kuritz, J.W. Lee, C. A. Sanders, B. Bruce, I. Lee
{"title":"Biomolecular optoelectronic devices and their application to artificial sight","authors":"E. Greenbaum, M. Humayun, T. Kuritz, J.W. Lee, C. A. Sanders, B. Bruce, I. Lee","doi":"10.1109/IEDM.2002.1175888","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175888","url":null,"abstract":"Using the technique of Kelvin force microscopy, we have performed the first measurements of photovoltages from single photosynthetic reaction centers. The measured values, typically 1 V or more, are sufficiently large to trigger a neural response. The goal of the project is insertion of purified Photosystem I (PSI) reaction centers or other photoactive agents into retinal cells where they will restore photoreceptor function to people who suffer from age-related macular degeneration (AMD) or retinitis pigmentosa (RP), diseases that are the leading causes of blindness world-wide. Although the neural wiring from eye to brain is intact, these patients lack photoreceptor activity. It is the ultimate goal of this proposal to restore photoreceptor activity to these patients using PSI as the optical trigger. In principle, the approach should work. PSI is a robust integral membrane molecular photovoltaic device. Depending on orientation, it can depolarize or hyperpolarize the cell membrane with sufficient voltage to trigger an action potential.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"45 1","pages":"496-498"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85508457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
NBTI mechanism in ultra-thin gate dielectric - nitrogen-originated mechanism in SiON 超薄栅极介质中NBTI的形成机理-氮源机制
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175891
Y. Mitani, M. Nagamine, H. Satake, A. Toriumi
{"title":"NBTI mechanism in ultra-thin gate dielectric - nitrogen-originated mechanism in SiON","authors":"Y. Mitani, M. Nagamine, H. Satake, A. Toriumi","doi":"10.1109/IEDM.2002.1175891","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175891","url":null,"abstract":"We have investigated the mechanism of negative bias temperature (NBT) degradation of p/sup +/-gate p-MOSFETs having SiON and SiO/sub 2/ films. As a result, it was found that NBT degradation of SiO/sub 2/ is improved by fluorine incorporation, while no effect is observed in that of SiON, and that the activation energy of NBT degradation in SiON is lower than that in SiO/sub 2/. From these experimental results, it is inferred that nitrogen-originated NBT degradation dominates NBT degradation in SiON. It was also found that non-energetic holes existing in the inversion layer contribute to NBT degradation for both SiON and SiO/sub 2/ films, and that the oxide field is indispensable for NBT degradation.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"17 1","pages":"509-512"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83011582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 83
Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset 利用基于列的反馈复位抑制二维CMOS光电二极管像素中的复位噪声
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175961
B. Pain, T. Cunningham, B. Hancock, G. Yang, S. Seshadri, M. Ortiz
{"title":"Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset","authors":"B. Pain, T. Cunningham, B. Hancock, G. Yang, S. Seshadri, M. Ortiz","doi":"10.1109/IEDM.2002.1175961","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175961","url":null,"abstract":"We present a new CMOS photodiode imager pixel with ultralow read noise through on-chip suppression of reset noise via column-based feedback circuitry. In a 0.5 /spl mu/m CMOS process, the pixel occupies only 10/spl times/10 /spl mu/m/sup 2/ area. Data from a 256/sup 2/ CMOS imager indicates imager operation with read noise as low as 6 electrons without employing on- or off-chip correlated double sampling. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full-well.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"49 1","pages":"809-812"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90919718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
SON (Silicon-On-Nothing) P-MOSFETs with totally silicided (CoSi/sub 2/) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels 在5纳米厚的硅薄膜上完全硅化(CoSi/sub 2/)多晶硅的SON (Silicon-On-Nothing) p - mosfet:在薄FD通道上集成金属栅极的最简单方法
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175828
S. Monfray, T. Skotnicki, B. Tavel, Y. Morand, S. Descombes, A. Talbot, D. Dutartre, C. Jenny, P. Mazoyer, R. Palla, F. Leverd, Y. Le Friec, R. Pantel, M. Haond, C. Charbuillet, C. Vizioz, D. Louis, N. Buffet
{"title":"SON (Silicon-On-Nothing) P-MOSFETs with totally silicided (CoSi/sub 2/) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels","authors":"S. Monfray, T. Skotnicki, B. Tavel, Y. Morand, S. Descombes, A. Talbot, D. Dutartre, C. Jenny, P. Mazoyer, R. Palla, F. Leverd, Y. Le Friec, R. Pantel, M. Haond, C. Charbuillet, C. Vizioz, D. Louis, N. Buffet","doi":"10.1109/IEDM.2002.1175828","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175828","url":null,"abstract":"In this paper, the first SON (Silicon On Nothing) devices with metal gate are presented. Extremely thin fully depleted Si-films are recognized to be integrable with single-metal gate (mid-gap) due to their intrinsically low threshold voltage. In this work we present mid-gap CoSi/sub 2/ metal gate by total gate silicidation on SON transistors with Si-conduction channel thickness down to 5 nm. Due to its architecture and to the continuity between SD areas and the bulk, SON transistors allow deep silicidation processing down to the gate oxide, meaning that no more polysilicon is left. SON PMOS devices were performed with 55 nm CoSi/sub 2/ gate length with 5 nm of Si-channel thickness, and show excellent performances (350 /spl mu/A//spl mu/m I/sub on/ with only 0.1 nA I/sub off/ at -1.4 V with T/sub ox/=20 /spl Aring/). The polydepletion is of course suppressed and the gate resistance (<2 /spl Omega///spl square/) is very competitive for RF applications.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"8 1","pages":"263-266"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84163760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Characterization and comparison of two metal-insulator-metal capacitor schemes in 0.13 /spl mu/m copper dual damascene metallization process for mixed-mode and RF applications 用于混合模式和射频应用的0.13 /spl mu/m铜双damascene金属化工艺中两种金属-绝缘体-金属电容器方案的表征和比较
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175822
C. Ng, K. Chew, J.X. Li, T. Tjoa, L. Goh, S. Chu
{"title":"Characterization and comparison of two metal-insulator-metal capacitor schemes in 0.13 /spl mu/m copper dual damascene metallization process for mixed-mode and RF applications","authors":"C. Ng, K. Chew, J.X. Li, T. Tjoa, L. Goh, S. Chu","doi":"10.1109/IEDM.2002.1175822","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175822","url":null,"abstract":"In this paper, we report on two manufacturable, low-cost MIM capacitor structures with Cu and Ta bottom electrode for 0.13 /spl mu/m 6-level Cu-metallization technology. The quality factor (Q) of the MIM capacitor with SiN dielectric directly deposited on the Cu surface is found to be twice as high as that with Ta bottom plate. Both the Cu and Ta bottom-plate capacitors were found to exhibit low leakage and high breakdown field strength characteristics, as well as absence of dispersive behaviour, and good voltage and temperature linearity. The impact of the Cu surface roughness on the dielectric reliability was reduced by optimizing SiN precursor gas flow.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"36 1","pages":"241-244"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79800925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Spectroscopic analysis of trap assisted tunneling in thin oxides by means of substrate hot electron injection experiments 基于衬底热电子注入实验的薄氧化物中陷阱辅助隧穿的光谱分析
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175803
F. Driussi, R. Iob, D. Esseni, L. Selmi, R. van Schaijk, F. Widdershoven
{"title":"Spectroscopic analysis of trap assisted tunneling in thin oxides by means of substrate hot electron injection experiments","authors":"F. Driussi, R. Iob, D. Esseni, L. Selmi, R. van Schaijk, F. Widdershoven","doi":"10.1109/IEDM.2002.1175803","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175803","url":null,"abstract":"In this paper we present experimental evidence of the contribution of stress induced traps to Substrate Hot Electron (SHE) injection. We investigate the energy distribution of traps generated by Fowler Nordheim (FN) and Hot Electron (HE) stress with the aid of simulations and experiments. Results suggest that HE stress generates more oxide traps at high energy with respect to FN stress. The comparison between experiments and simulations also provides a new additional evidence of the inelastic nature of the trap assisted tunneling mechanism.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"61 1","pages":"159-162"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83616957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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