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A study of subband structure and transport of two-dimensional holes in strained-Si p-MOSFETs using full-band modeling 用全带模型研究应变si - p- mosfet中二维空穴的子带结构和输运
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175941
H. Nakatsuji, Y. Kamakura, K. Taniguchi
{"title":"A study of subband structure and transport of two-dimensional holes in strained-Si p-MOSFETs using full-band modeling","authors":"H. Nakatsuji, Y. Kamakura, K. Taniguchi","doi":"10.1109/IEDM.2002.1175941","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175941","url":null,"abstract":"The quantum confinement of the two-dimensional (2D) hole gas in the inversion layer of strained-Si p-MOSFETs is investigated theoretically. The hole mobility enhancement was found to originate from the suppressed inter-band scattering due to subband splitting and the reduced effective mass in the lowest subband with strain.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"28 1","pages":"727-730"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83708886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Novel SOI wafer engineering using low stress and high mobility CMOSFET with <100>-channel for embedded RF/analog applications 新颖的SOI晶圆工程，采用低应力和高迁移率CMOSFET与-通道，用于嵌入式射频/模拟应用
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175926
T. Matsumoto, S. Maeda, H. Dang, T. Uchida, K. Ota, Y. Hirano, H. Sayama, T. Iwamatsu, T. Ipposhi, H. Oda, S. Maegawa, Y. Inoue, T. Nishimura
{"title":"Novel SOI wafer engineering using low stress and high mobility CMOSFET with <100>-channel for embedded RF/analog applications","authors":"T. Matsumoto, S. Maeda, H. Dang, T. Uchida, K. Ota, Y. Hirano, H. Sayama, T. Iwamatsu, T. Ipposhi, H. Oda, S. Maegawa, Y. Inoue, T. Nishimura","doi":"10.1109/IEDM.2002.1175926","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175926","url":null,"abstract":"For high performance RF/analog and logic device technology, novel SOI wafer engineering featuring <100>-channel SOI CMOSFET with high-resistivity substrate is proposed. Mobility of PMOSFET is improved about 16% by changing a channel direction from <110> to <100>. Moreover, the reduction of the drive current in narrow channel PMOSFET is suppressed. The maximum oscillation frequency (f/sub max/) for NMOSFET is improved around 7% by changing the buried oxide (BOX) thickness from 400 nm to 150 nm because the self-heating effect is suppressed, and is improved around 5% by changing the substrate resistivity from 10 /spl Omega/cm to 1000 /spl Omega/cm because the power loss is reduced. In this work, the wafer engineering which consists of 1) <100>-channel, 2) optimization of BOX, and 3) high resistivity substrate, is proposed to improve the RF performance of the CMOSFET.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"186 1","pages":"663-666"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83045839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Junction defects of self-aligned, excimer-laser-annealed poly-Si TFTs 自对准准激光退火多晶硅tft的结缺陷
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175906
K.C. Park, S.H. Jung, M.C. Lee, S.H. Kang, K. Moon, M. Han
{"title":"Junction defects of self-aligned, excimer-laser-annealed poly-Si TFTs","authors":"K.C. Park, S.H. Jung, M.C. Lee, S.H. Kang, K. Moon, M. Han","doi":"10.1109/IEDM.2002.1175906","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175906","url":null,"abstract":"Reports residual ion implantation damage at source/drain junctions of self-aligned, excimer-laser-annealed poly-Si TFTs. TEM observation revealed that the implantation damage was not completely annealed at the junction by excimer laser annealing because the laser irradiation intensity decreased remarkably at the junction due to diffraction of laser beam at gate electrode edge. Field effect mobility of poly-Si TFTs was degraded by the crystalline defects at the junction particularly for short channel devices. We eliminated the junction defects by oblique-incidence excimer laser annealing and improved the characteristics of poly-Si TFTs.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"31 1","pages":"573-576"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84485087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variation in natural threshold voltage of NVM circuits due to dopant fluctuations and its impact on reliability 掺杂物引起的NVM电路自然阈值电压变化及其对可靠性的影响
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175896
D. Burnett, J. Higman, A. Hoefler, C.-N.B. Li, P. Kuhn
{"title":"Variation in natural threshold voltage of NVM circuits due to dopant fluctuations and its impact on reliability","authors":"D. Burnett, J. Higman, A. Hoefler, C.-N.B. Li, P. Kuhn","doi":"10.1109/IEDM.2002.1175896","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175896","url":null,"abstract":"The statistical distribution of the natural threshold voltage (V/sub T0/) of 512k-bit NVM circuit arrays has been studied for two different technologies. The major source of the V/sub T0/ variation is dopant fluctuations of the NVM well. An analytical model for the dopant fluctuations provides excellent agreement with the measured circuit V/sub T0/ variation and NVM cell mismatch for both technologies. The reliability implications of the V/sub T0/ variation are considered using charge leakage models for data retention.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"43 1","pages":"529-532"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83490143","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Biomolecular optoelectronic devices and their application to artificial sight 生物分子光电器件及其在人工视觉中的应用
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175888
E. Greenbaum, M. Humayun, T. Kuritz, J.W. Lee, C. A. Sanders, B. Bruce, I. Lee
{"title":"Biomolecular optoelectronic devices and their application to artificial sight","authors":"E. Greenbaum, M. Humayun, T. Kuritz, J.W. Lee, C. A. Sanders, B. Bruce, I. Lee","doi":"10.1109/IEDM.2002.1175888","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175888","url":null,"abstract":"Using the technique of Kelvin force microscopy, we have performed the first measurements of photovoltages from single photosynthetic reaction centers. The measured values, typically 1 V or more, are sufficiently large to trigger a neural response. The goal of the project is insertion of purified Photosystem I (PSI) reaction centers or other photoactive agents into retinal cells where they will restore photoreceptor function to people who suffer from age-related macular degeneration (AMD) or retinitis pigmentosa (RP), diseases that are the leading causes of blindness world-wide. Although the neural wiring from eye to brain is intact, these patients lack photoreceptor activity. It is the ultimate goal of this proposal to restore photoreceptor activity to these patients using PSI as the optical trigger. In principle, the approach should work. PSI is a robust integral membrane molecular photovoltaic device. Depending on orientation, it can depolarize or hyperpolarize the cell membrane with sufficient voltage to trigger an action potential.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"45 1","pages":"496-498"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85508457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
NBTI mechanism in ultra-thin gate dielectric - nitrogen-originated mechanism in SiON 超薄栅极介质中NBTI的形成机理-氮源机制
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175891
Y. Mitani, M. Nagamine, H. Satake, A. Toriumi
{"title":"NBTI mechanism in ultra-thin gate dielectric - nitrogen-originated mechanism in SiON","authors":"Y. Mitani, M. Nagamine, H. Satake, A. Toriumi","doi":"10.1109/IEDM.2002.1175891","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175891","url":null,"abstract":"We have investigated the mechanism of negative bias temperature (NBT) degradation of p/sup +/-gate p-MOSFETs having SiON and SiO/sub 2/ films. As a result, it was found that NBT degradation of SiO/sub 2/ is improved by fluorine incorporation, while no effect is observed in that of SiON, and that the activation energy of NBT degradation in SiON is lower than that in SiO/sub 2/. From these experimental results, it is inferred that nitrogen-originated NBT degradation dominates NBT degradation in SiON. It was also found that non-energetic holes existing in the inversion layer contribute to NBT degradation for both SiON and SiO/sub 2/ films, and that the oxide field is indispensable for NBT degradation.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"17 1","pages":"509-512"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83011582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 83
Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset 利用基于列的反馈复位抑制二维CMOS光电二极管像素中的复位噪声
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175961
B. Pain, T. Cunningham, B. Hancock, G. Yang, S. Seshadri, M. Ortiz
{"title":"Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset","authors":"B. Pain, T. Cunningham, B. Hancock, G. Yang, S. Seshadri, M. Ortiz","doi":"10.1109/IEDM.2002.1175961","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175961","url":null,"abstract":"We present a new CMOS photodiode imager pixel with ultralow read noise through on-chip suppression of reset noise via column-based feedback circuitry. In a 0.5 /spl mu/m CMOS process, the pixel occupies only 10/spl times/10 /spl mu/m/sup 2/ area. Data from a 256/sup 2/ CMOS imager indicates imager operation with read noise as low as 6 electrons without employing on- or off-chip correlated double sampling. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full-well.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"49 1","pages":"809-812"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90919718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
SON (Silicon-On-Nothing) P-MOSFETs with totally silicided (CoSi/sub 2/) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels 在5纳米厚的硅薄膜上完全硅化(CoSi/sub 2/)多晶硅的SON (Silicon-On-Nothing) p - mosfet:在薄FD通道上集成金属栅极的最简单方法
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175828
S. Monfray, T. Skotnicki, B. Tavel, Y. Morand, S. Descombes, A. Talbot, D. Dutartre, C. Jenny, P. Mazoyer, R. Palla, F. Leverd, Y. Le Friec, R. Pantel, M. Haond, C. Charbuillet, C. Vizioz, D. Louis, N. Buffet
{"title":"SON (Silicon-On-Nothing) P-MOSFETs with totally silicided (CoSi/sub 2/) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels","authors":"S. Monfray, T. Skotnicki, B. Tavel, Y. Morand, S. Descombes, A. Talbot, D. Dutartre, C. Jenny, P. Mazoyer, R. Palla, F. Leverd, Y. Le Friec, R. Pantel, M. Haond, C. Charbuillet, C. Vizioz, D. Louis, N. Buffet","doi":"10.1109/IEDM.2002.1175828","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175828","url":null,"abstract":"In this paper, the first SON (Silicon On Nothing) devices with metal gate are presented. Extremely thin fully depleted Si-films are recognized to be integrable with single-metal gate (mid-gap) due to their intrinsically low threshold voltage. In this work we present mid-gap CoSi/sub 2/ metal gate by total gate silicidation on SON transistors with Si-conduction channel thickness down to 5 nm. Due to its architecture and to the continuity between SD areas and the bulk, SON transistors allow deep silicidation processing down to the gate oxide, meaning that no more polysilicon is left. SON PMOS devices were performed with 55 nm CoSi/sub 2/ gate length with 5 nm of Si-channel thickness, and show excellent performances (350 /spl mu/A//spl mu/m I/sub on/ with only 0.1 nA I/sub off/ at -1.4 V with T/sub ox/=20 /spl Aring/). The polydepletion is of course suppressed and the gate resistance (<2 /spl Omega///spl square/) is very competitive for RF applications.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"8 1","pages":"263-266"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84163760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Characterization and comparison of two metal-insulator-metal capacitor schemes in 0.13 /spl mu/m copper dual damascene metallization process for mixed-mode and RF applications 用于混合模式和射频应用的0.13 /spl mu/m铜双damascene金属化工艺中两种金属-绝缘体-金属电容器方案的表征和比较
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175822
C. Ng, K. Chew, J.X. Li, T. Tjoa, L. Goh, S. Chu
{"title":"Characterization and comparison of two metal-insulator-metal capacitor schemes in 0.13 /spl mu/m copper dual damascene metallization process for mixed-mode and RF applications","authors":"C. Ng, K. Chew, J.X. Li, T. Tjoa, L. Goh, S. Chu","doi":"10.1109/IEDM.2002.1175822","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175822","url":null,"abstract":"In this paper, we report on two manufacturable, low-cost MIM capacitor structures with Cu and Ta bottom electrode for 0.13 /spl mu/m 6-level Cu-metallization technology. The quality factor (Q) of the MIM capacitor with SiN dielectric directly deposited on the Cu surface is found to be twice as high as that with Ta bottom plate. Both the Cu and Ta bottom-plate capacitors were found to exhibit low leakage and high breakdown field strength characteristics, as well as absence of dispersive behaviour, and good voltage and temperature linearity. The impact of the Cu surface roughness on the dielectric reliability was reduced by optimizing SiN precursor gas flow.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"36 1","pages":"241-244"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79800925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Spectroscopic analysis of trap assisted tunneling in thin oxides by means of substrate hot electron injection experiments 基于衬底热电子注入实验的薄氧化物中陷阱辅助隧穿的光谱分析
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175803
F. Driussi, R. Iob, D. Esseni, L. Selmi, R. van Schaijk, F. Widdershoven
{"title":"Spectroscopic analysis of trap assisted tunneling in thin oxides by means of substrate hot electron injection experiments","authors":"F. Driussi, R. Iob, D. Esseni, L. Selmi, R. van Schaijk, F. Widdershoven","doi":"10.1109/IEDM.2002.1175803","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175803","url":null,"abstract":"In this paper we present experimental evidence of the contribution of stress induced traps to Substrate Hot Electron (SHE) injection. We investigate the energy distribution of traps generated by Fowler Nordheim (FN) and Hot Electron (HE) stress with the aid of simulations and experiments. Results suggest that HE stress generates more oxide traps at high energy with respect to FN stress. The comparison between experiments and simulations also provides a new additional evidence of the inelastic nature of the trap assisted tunneling mechanism.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"61 1","pages":"159-162"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83616957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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