Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference最新文献_第2页

A cascadable 200 GOPS motion estimation chip for HDTV applications 用于HDTV应用的可级联200 GOPS运动估计芯片

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510574

J. Berns, T. Noll

引用次数: 16

A quarter-micron SIMOX-CMOS LVTTL-compatible gate array with an over 2,000 V ESD-protection circuit 四分之一微米SIMOX-CMOS lvttl兼容门阵列，具有超过2,000 V的esd保护电路

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510511

Y. Ohtomo, T. Mizusawa, K. Nishimura, H. Sawada, M. Ino

引用次数: 4

An efficient approach to device parameter extraction for statistical IC modeling 统计IC建模中器件参数提取的一种有效方法

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.511091

M. Qu, M. Styblinski

引用次数: 1

A low noise readout detector circuit for nano-ampere sensor applications 用于纳米安培传感器的低噪声读出检测器电路

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510561

D. Thelen, D. D. Chu

引用次数: 9

Efficient standard cell generation when diffusion strapping is required 当需要扩散捆扎时，有效的标准细胞生成

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510606

B. Guan, C. Sechen

{"title":"Efficient standard cell generation when diffusion strapping is required","authors":"B. Guan, C. Sechen","doi":"10.1109/CICC.1996.510606","DOIUrl":"https://doi.org/10.1109/CICC.1996.510606","url":null,"abstract":"The authors have proposed a single contact layout style (SC style) for CMOS standard cells with regular and compact structure, based on the assumption that a single diffusion contact is sufficient. In reality, the assumption is not always true. They therefore propose a partial strapping style (PS style) for use when diffusion strapping is required. The PS style keeps all the features of the SC style. The structure uses less area for individual cells, allows easy embedding of feedthroughs in the cell, and enables output pins to occur at any grid location. Using an exact algorithm to generate static CMOS cells with a minimum number of diffusion breaks ensures that the width of the cells is minimized. For the PS style, a constructive routing algorithm is used to perform the intra-cell routing. An exhaustive search among the minimum width cells produces the minimum height cell. Results show that cells in the PS style have cell height very close to those in the SC style. Furthermore, cells using either layout style achieve significant area savings compared to cells using the traditional full strapping style.","PeriodicalId":74515,"journal":{"name":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","volume":"57 1","pages":"501-504"},"PeriodicalIF":0.0,"publicationDate":"1996-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85468346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Practical analysis of cyclic combinational circuits 循环组合电路的实用分析

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510580

A. Srinivasan, S. Malik

{"title":"Practical analysis of cyclic combinational circuits","authors":"A. Srinivasan, S. Malik","doi":"10.1109/CICC.1996.510580","DOIUrl":"https://doi.org/10.1109/CICC.1996.510580","url":null,"abstract":"Cycles arise in combinational logic circuits under a variety of different circumstances. Typically a cyclic combinational circuit consists of a set of acyclic circuits multiplexed to share resources in a cyclic topology. Recently Malik (1993) provided an algorithm for deciding if a given circuit with cycles is combinational and also an algorithm for static timing analysis of such circuits. The logical analysis technique was based on OBDDs and the timing analysis technique was based on solving the false path problem for a large and complex circuit. As a result that method does not scale well to very large circuits. Prior to the present work, the only option left for designers was to do a case analysis by manually identifying the different acyclic circuits multiplexed in the cyclic structure, and then performing logical and timing analysis on this set of acyclic circuits. In this paper, we provide an analysis technique that automatically identifies the set of acyclic circuits constituting the cyclic circuit. This enables designers to directly use existing logical and timing analysis tools on this set of acyclic circuits. In addition to providing a more intuitive analysis, the proposed algorithm also scales easily to handle the very large circuits encountered in practice, with runtimes of a few hundred seconds on circuits with over 15000 gates.","PeriodicalId":74515,"journal":{"name":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","volume":"8 1","pages":"381-384"},"PeriodicalIF":0.0,"publicationDate":"1996-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77269489","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Exact multi-layer topological planar routing 精确的多层拓扑平面布线

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510538

O. Coudert, C. Shi

引用次数: 5

An angular rate sensor interface IC 一种角速率传感器接口集成电路

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510565

S. Zarabadi, P.E. Castillo-Borelly, J.D. Johnson

引用次数: 9

Implementing and evaluating adiabatic arithmetic units 绝热算术单元的实现和计算

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510524

M. C. Knapp, P. Kindlmann, M. Papaefthymiou

引用次数: 36

An investigation on the robustness, accuracy and simulation performance of a physics-based deep-submicronmeter BSIM model for analog/digital circuit simulation 基于物理的深亚微米模拟/数字电路仿真BSIM模型的鲁棒性、准确性和仿真性能研究

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI: 10.1109/CICC.1996.510567

Yuhua Cheng, M. Jeng, Zhihong Liu, Kai Chen, M. Chan, C. Hu, Ping Keung Kox

引用次数: 8