Efficient standard cell generation when diffusion strapping is required

Abstract

The authors have proposed a single contact layout style (SC style) for CMOS standard cells with regular and compact structure, based on the assumption that a single diffusion contact is sufficient. In reality, the assumption is not always true. They therefore propose a partial strapping style (PS style) for use when diffusion strapping is required. The PS style keeps all the features of the SC style. The structure uses less area for individual cells, allows easy embedding of feedthroughs in the cell, and enables output pins to occur at any grid location. Using an exact algorithm to generate static CMOS cells with a minimum number of diffusion breaks ensures that the width of the cells is minimized. For the PS style, a constructive routing algorithm is used to perform the intra-cell routing. An exhaustive search among the minimum width cells produces the minimum height cell. Results show that cells in the PS style have cell height very close to those in the SC style. Furthermore, cells using either layout style achieve significant area savings compared to cells using the traditional full strapping style.