Iet Circuits Devices & Systems最新文献_第3页

Generative Target Tracking Method with Improved Generative Adversarial Network 基于改进生成对抗网络的生成目标跟踪方法

IF 1 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-10-23 DOI: 10.1049/2023/6620581

Yongping Yang, Hongshun Chen

{"title":"Generative Target Tracking Method with Improved Generative Adversarial Network","authors":"Yongping Yang, Hongshun Chen","doi":"10.1049/2023/6620581","DOIUrl":"10.1049/2023/6620581","url":null,"abstract":"<div>\u0000 Multitarget tracking is prone to target loss, identity exchange, and jumping problems in the context of complex background, target occlusion, target scale, and pose transformation. In this paper, we proposed a target tracking algorithm based on the conditional adversarial generative twin networks, using the improved you only look once multitarget association algorithm to classify and detect the position of the target to be detected in the current frame, constructing a feature extraction model using generative adversarial networks (GANs) to learn the main features and subtle features of the target, and then using GANs to generate the motion trajectories of multiple targets, finally fuzing the motion and appearance information of the target to obtain the optimal match. The optimal matching of the tracked targets is obtained. The experimental results under OTB2015 and IVOT2018 datasets demonstrate that the proposed multitarget tracking algorithm has high accuracy and robustness, with 65% less jumps and 0.25% more accuracy than the current algorithms with minimal identity exchange and jumps.\u0000 </div>","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2023 1","pages":""},"PeriodicalIF":1.0,"publicationDate":"2023-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/2023/6620581","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135414865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Linear broadband interference suppression circuit based on GaN monolithic microwave integrated circuits 基于GaN单片微波集成电路的线性宽带干扰抑制电路

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-07-26 DOI: 10.1049/cds2.12159

Megan C. Robinson, Zoya Popović, Gregor Lasser

{"title":"Linear broadband interference suppression circuit based on GaN monolithic microwave integrated circuits","authors":"Megan C. Robinson, Zoya Popović, Gregor Lasser","doi":"10.1049/cds2.12159","DOIUrl":"https://doi.org/10.1049/cds2.12159","url":null,"abstract":"This paper presents simulation and measurement results of a 2–4 GHz octave bandwidth interference suppression circuit. The circuit accomplishes the function of a tunable frequency notch through an interferometer architecture. The relative delay in the interferometer paths is varied with GaN monolithic microwave integrated circuit tunable delay lines. The delay is adjusted by varying the drain voltage of cold-FET connected high electron mobility transistors acting as varactors. Two types of periodically-loaded delay lines are compared: a uniform and a tapered design. A simple theoretical study, relating the delays and amplitudes in the interferometer circuit branches, is developed to inform the design. Two interference suppression hybrid circuits are implemented, and measurements demonstrate a 25–40 dB notch across the 2.24–4 GHz range for the uniform delay line, and 2.32–4.13 GHz for the tapered design. The return loss for both designs remains below 10 dB. Measurements with two tones spaced 0.5 and 1 GHz for varying tone power are performed to quantify suppression. The circuit can handle an input power of 37 dBm and maintains performance with two simultaneous 25 dBm tones spaced 0.5 GHz apart. Linearity is characterised with 10 MHz two-tone measurements, and the circuit demonstrates a 3rd-order intercept input power larger than 30 dBm for control biases above −12 V.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"213-224"},"PeriodicalIF":1.3,"publicationDate":"2023-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12159","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50144516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mechanical model analysis and reliability design approach of Quartz Flexible Accelerometer under fractured state 石英挠性加速度计断裂状态下的力学模型分析及可靠性设计方法

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-07-06 DOI: 10.1049/cds2.12161

Tingyu Xiao, Chunxi Zhang, Lailiang Song, Longjun Ran, Wanying Huang

{"title":"Mechanical model analysis and reliability design approach of Quartz Flexible Accelerometer under fractured state","authors":"Tingyu Xiao, Chunxi Zhang, Lailiang Song, Longjun Ran, Wanying Huang","doi":"10.1049/cds2.12161","DOIUrl":"https://doi.org/10.1049/cds2.12161","url":null,"abstract":"Currently, the Quartz Flexible Accelerometer (QFA) mounted for the applications working in high acceleration environment are suffering from the fracture of the flexible beams under external acceleration shock. This paper presents the mechanical model and reliability design approach of QFA to maintain the measuring ability under a fractured state. The structural parameters changed significantly in the mechanical model under a fractured state compared to those in the original model. A modified structure to maintain the measuring ability of QFA under a fractured state is designed with the reference of the sensitive module in Electrostatic Suspended Accelerometer (ESA). The corresponding close-loop system is corrected and discretised to ensure the stability requirements of the mechanical model. A static experiment is conducted to prove the effectiveness of the proposed model by a prototype QFA with completely fractured flexible beams. The result shows helpful on the preliminary research for QFA with the similar sensitive structure to ESA.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"225-234"},"PeriodicalIF":1.3,"publicationDate":"2023-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12161","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50122710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Improvements in reliability and radio frequency performance of junctionless tunnelling field effect transistor using p+ pocket and metal strip 利用p+袋和金属带提高无连接隧道场效应晶体管的可靠性和射频性能

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-07-06 DOI: 10.1049/cds2.12162

Alireza Zirak

{"title":"Improvements in reliability and radio frequency performance of junctionless tunnelling field effect transistor using p+ pocket and metal strip","authors":"Alireza Zirak","doi":"10.1049/cds2.12162","DOIUrl":"https://doi.org/10.1049/cds2.12162","url":null,"abstract":"In this article, a new p+ pocket stacked gate oxide junctionless tunnelling field effect transistor (junction less tunnelling field effect transistor (JLTFET)) which has metal strip in gate oxide layer is proposed for analogue/RF circuit applications. Due to the insertion of a p+ pocket in source/channel junction and the use of metal strip in oxide layer, the following properties of the proposed JLTFET are resulted. First, the tunnelling barrier width is reduced in the source/channel junction thereby, electrons easily tunnel from the source to the channel. Second, the hole concentration (empty state) in the channel is increased, leading to higher electron contribution in the tunnelling process. These improvements are useful in achieving high drain current and steep subthreshold swing. As a result, the maximum ON current of 4.4 × 10−5 A/μm and average subthreshold swing of 40 mV/decade are obtained from simulation results. Moreover, as compared to conventional JLTFET, the proposed JLTFET provides improvements in reliability and analogue/radio frequency (RF) performance.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"235-243"},"PeriodicalIF":1.3,"publicationDate":"2023-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12162","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50122711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A chipless light switch for smart-homes 用于智能家居的无芯片电灯开关

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-07-06 DOI: 10.1049/cds2.12163

Abdullah S. Almansouri

引用次数: 1

Retracted 缩回

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-07-04 DOI: 10.1049/cds2.12164

引用次数: 4

A hardware prototype of wideband high-dynamic range analog-to-digital converter 宽带高动态范围模数转换器的硬件原型

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-06-26 DOI: 10.1049/cds2.12156

Satish Mulleti, Eliya Reznitskiy, Shlomi Savariego, Moshe Namer, Nimrod Glazer, Yonina C. Eldar

{"title":"A hardware prototype of wideband high-dynamic range analog-to-digital converter","authors":"Satish Mulleti, Eliya Reznitskiy, Shlomi Savariego, Moshe Namer, Nimrod Glazer, Yonina C. Eldar","doi":"10.1049/cds2.12156","DOIUrl":"https://doi.org/10.1049/cds2.12156","url":null,"abstract":"Key parameters of analog-to-digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important role, and ideally, it should be greater than the signal's; otherwise, the signal will be clipped. To avoid clipping, modulo folding can be used before sampling, followed by an unfolding algorithm to recover the true signal. Here, the authors present a modulo hardware prototype that can be used before sampling to avoid clipping. The authors’ modulo hardware operates prior to the sampling mechanism and can fold higher frequency signals compared to existing hardware. The authors present a detailed design of the hardware and also address key issues that arise during implementation. In terms of applications, the authors show the reconstruction of finite-rate-of-innovation signals, which are beyond the dynamic range of the ADC. The authors’ system operates at six times below the Nyquist rate of the signal and can accommodate eight times larger signals than the ADC's dynamic range.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"181-192"},"PeriodicalIF":1.3,"publicationDate":"2023-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12156","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50144906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A high-capacity and nonvolatile spintronic associative memory hardware accelerator 一种高容量非易失性自旋电子联想存储器硬件加速器

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-06-21 DOI: 10.1049/cds2.12160

Mahan Rezaei, Abdolah Amirany, Mohammad Hossein Moaiyeri, Kian Jafari

{"title":"A high-capacity and nonvolatile spintronic associative memory hardware accelerator","authors":"Mahan Rezaei, Abdolah Amirany, Mohammad Hossein Moaiyeri, Kian Jafari","doi":"10.1049/cds2.12160","DOIUrl":"https://doi.org/10.1049/cds2.12160","url":null,"abstract":"Significant progress has been made in manufacturing emerging technologies in recent years. This progress implemented in-memory-computing and neural networks, one of today's hottest research topics. Over time, the need to process complex tasks has increased. This need causes the emergence of intelligent processors. A nonvolatile associative memory based on spintronic synapses utilising magnetic tunnel junction (MTJ) and carbon nanotube field-effect transistors (CNTFET)-based neurons is proposed. The proposed design uses the MTJ device because of its fascinating features, such as reliable reconfiguration and nonvolatility. At the same time, CNTFET has overcome conventional complementary metal-oxide-semiconductor shortcomings like the short channel effect, drain-induced barrier lowering, and poor hole mobility. The proposed design is simulated in the presence of process variations. The proposed design aims to increase the number of weights generated in the synapse for higher memory capacity and accuracy. The effect of different tunnel magnetoresistance (TMR) values (100%, 200%, and 300%) on the performance and accuracy of the proposed design has also been investigated. This investigation shows that the proposed design performs well even with a low TMR value, which is very important and remarkable from the fabrication point of view.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"205-212"},"PeriodicalIF":1.3,"publicationDate":"2023-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12160","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50153076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A compact frequency reconfigurable beam switching antenna based on a single-layer FSS 一种基于单层FSS的紧凑型频率可重构波束切换天线

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-05-09 DOI: 10.1049/cds2.12157

Guang Li, Yangyang Ye, Fushun Zhang

{"title":"A compact frequency reconfigurable beam switching antenna based on a single-layer FSS","authors":"Guang Li, Yangyang Ye, Fushun Zhang","doi":"10.1049/cds2.12157","DOIUrl":"https://doi.org/10.1049/cds2.12157","url":null,"abstract":"A compact frequency reconfigurable beam switching antenna based on a single-layer frequency selective face (FSS) is proposed in this paper. The proposed antenna consists of a dual-band dipole antenna and a single-layer FSS with hexagonally arrangement. The omnidirectional radiation pattern of the dipole antenna designed as a radiation source and surrounded by the FSS can be converted into directional radiation pattern sweeping along the entire azimuthal plane at two single frequency of 2.4 or 5 GHz. The frequency selection is achieved by controlling the diode state of the FSS unit, and the beam switching is realised by a specific combination of electromagnetic wave reflection or transmission from the hexagonal FSS. The novelty lies in applying the hexagonal arrangement to a dual single-frequency single-layer FSS unit. This will not destroy the reflection or transmission characteristics of the FSS unit, but also contribute to reduce the antenna size and achieve a low cost. To validate the design, a prototype is fabricated and measured. The single-layer FSS antenna with a volume of 57 mm × 57 mm × 58.5 mm can be scanned in 12 steps along the azimuth plane at 2.4 and 5 GHz, respectively.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"193-198"},"PeriodicalIF":1.3,"publicationDate":"2023-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12157","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50144497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

500 V breakdown voltage in β-Ga2O3 laterally diffused metal-oxide-semiconductor field-effect transistor with 108 MW/cm2 power figure of merit 108 MW/cm2功率因数的β-Ga2O3横向扩散金属氧化物半导体场效应晶体管的500 V击穿电压

IF 1.3 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2023-05-03 DOI: 10.1049/cds2.12158

Nesa Abedi Rik, Ali. A. Orouji, Dariush Madadi

{"title":"500 V breakdown voltage in β-Ga2O3 laterally diffused metal-oxide-semiconductor field-effect transistor with 108 MW/cm2 power figure of merit","authors":"Nesa Abedi Rik, Ali. A. Orouji, Dariush Madadi","doi":"10.1049/cds2.12158","DOIUrl":"https://doi.org/10.1049/cds2.12158","url":null,"abstract":"The authors’ present a silicon-on-insulator (SOI) laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) with β-Ga2O3 , which is a large bandgap semiconductor (β-LDMOSFET), for increasing breakdown voltage (VBR) and power figure of merit. The fundamental purpose is to use a β-Ga2O3 semiconductor instead of silicon material due to its large breakdown field. The characteristics of β-LDMOSFET are analysed to those of standard LDMOSFET, such as VBR, ON-resistance (RON), power figure of merit (PFOM), and radio frequency (RF) performances. The effects of RF, such as gate-drain capacitance (CGD), gate-source capacitance (CGS), transit frequency (fT), and maximum frequency of oscillation (fMAX) have been investigated. The β-LDMOSFET structure outperforms performance in the VBR by increasing it to 500 versus 84.4 V in standard LDMOSFET design. The suggested β-LDMOSFET has RON ~ 2.3 mΩ.cm−2 and increased the PFOM (VBR2/RON) to 108.6 MW/cm2. All the simulations are done with TCAD and simulation models are calibrated with the experimental data.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"17 4","pages":"199-204"},"PeriodicalIF":1.3,"publicationDate":"2023-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cds2.12158","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"50119060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5