IET Computers and Digital Techniques最新文献

{"title":"TLP: Towards three-level loop parallelisation","authors":"Shabnam Mahjoub,&nbsp;Mehdi Golsorkhtabaramiri,&nbsp;Seyed Sadegh Salehi Amiri","doi":"10.1049/cdt2.12046","DOIUrl":"10.1049/cdt2.12046","url":null,"abstract":"<p>Due to the design of computer systems in the multi-core and/or multi-processor form, it is possible to use the maximum capacity of processors to run an application with the least time consumed through parallelisation. This is the responsibility of parallel compilers, which perform parallelisation in several steps by distributing iterations between different processors and executing them simultaneously to achieve lower runtime. The present paper focuses on the uniformisation of three-level perfect nested loops as an important step in parallelisation and proposes a method called Towards Three-Level Loop Parallelisation (TLP) that uses a combination of a Frog Leaping Algorithm and Fuzzy to achieve optimal results because in recent years, many algorithms have worked on volumetric data, that is, three-dimensional spaces. Results of the implementation of the TLP algorithm in comparison with existing methods lead to a wide variety of optimal results at desired times, with minimum cone size resulting from the vectors. Besides, the maximum number of input dependence vectors is decomposed by this algorithm. These results can accelerate the process of generating parallel codes and facilitate their development for High-Performance Computing purposes.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 5-6","pages":"159-171"},"PeriodicalIF":1.2,"publicationDate":"2022-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12046","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74517978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Guest Editorial: Special issue on battery-free computing","authors":"Geoff V. Merrett,&nbsp;Bernd-Christian Renner,&nbsp;Brandon Lucia","doi":"10.1049/cdt2.12043","DOIUrl":"10.1049/cdt2.12043","url":null,"abstract":"&lt;p&gt;In order to realise the vision and scale of the Internet of Things (IoT), we cannot rely on mains electricity or batteries to power devices due to environmental, maintenance, cost and physical volume implications. Considerable research has been undertaken in energy harvesting, allowing systems to extract electrical energy from their surrounding environments. However, such energy is typically highly dynamic, both spatially and temporally. In recent years, there has been an increase in research around how computing can be effectively performed from energy harvesting supplies, moving beyond the concepts of battery-powered and energy-neutral systems, thus enabling battery-free computing.&lt;/p&gt;&lt;p&gt;Challenges in battery-free computing are broad and wide-ranging, cutting across the spectrum of electronics and computer science—for example, circuits, algorithms, computer architecture, communication and networking, middleware, applications, deployments, and modelling and simulation tools.&lt;/p&gt;&lt;p&gt;This special issue explores the challenges, issues and opportunities in the research, design, and engineering of energy-harvesting, energy-neutral and intermittent sensing systems. These are enabling technologies for future applications in smart energy, transportation, environmental monitoring and smart cities. Innovative solutions are needed to enable either uninterrupted or intermittent operation.&lt;/p&gt;&lt;p&gt;This special issue contains two papers on different aspects of battery-free computing, as described below.&lt;/p&gt;&lt;p&gt;Hanschke et al.‘s article on ‘EmRep: Energy Management Relying on State-of-Charge Extrema Prediction’ considers energy management in energy-neutral systems, particularly those with small energy storage elements (e.g. a supercapacitor). They observe that existing energy-neutral management approaches have a tendency to operate inefficiently when exposed to extremes in the harvesting environment, for example, wasting harvested power in times of abundant energy due to saturation of the energy storage device. To resolve this, the authors present an approach to predict extremes in device state-of-charge (SoC) when such conditions are occurring and hence switch to a less conservative and more immediate policy for device activity (and hence, consumption). This decouples energy management of high-intake from low-intake harvest periods and ensures that the saturation of energy storage is reduced by design. The approach is thoroughly experimentally evaluated in combination with a variety of different prediction algorithms, time resolutions, and energy storage sizes. Promising results indicate the potential for a doubling in effective utility in systems with only small energy storage elements.&lt;/p&gt;&lt;p&gt;The second paper in the special issue, authored by Stricker et al., continues the theme of energy prediction by considering the impact of harvesting source prediction errors on the system scheduler and hence the system's performance. Their article, ‘Robustness of Predict","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 4","pages":"89-90"},"PeriodicalIF":1.2,"publicationDate":"2022-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12043","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77386084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"ASATM: Automated security assistant of threat models in intelligent transportation systems","authors":"Mohammad Ali Ramazanzadeh,&nbsp;Behnam Barzegar,&nbsp;Homayun Motameni","doi":"10.1049/cdt2.12045","DOIUrl":"10.1049/cdt2.12045","url":null,"abstract":"<p>The evolution of technology has led to the appearance of smart cities. An essential element in such cities is smart mobility that covers the subjects related to Intelligent Transportation Systems (ITS). The problem is that the ITS vulnerabilities may considerably harm the life quality and safety status of human beings living in smart cities. In fact, software and hardware systems are more exposed to security risks and threats. To reduce threats and secure software design, threat modelling has been proposed as a preventive solution in the software design phase. On the other hand, threat modelling is always criticised for being time consuming, complex, difficult, and error prone. The approach proposed in this study, that is, Automated Security Assistant of Threat Models (ASATM), is an automated solution that is capable of achieving a high level of security assurance. By defining concepts and conceptual modelling as well as implementing automated security assistant algorithms, ASATM introduces a new approach to identifying threats, extracting security requirements, and designing secure software. The proposed approach demonstrates a quantitative classification of security at three levels (insecure, secure, and threat), twelve sub-levels (nominal scale and colour scale), and a five-layer depth (human understandability and conditional probability). In this study, to evaluate the effectiveness of our approach, an example with various security parameters and scenarios was tested and the results confirmed the superiority of the proposed approach over the latest threat modelling approaches in terms of method, learning, and model understanding.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 5-6","pages":"141-158"},"PeriodicalIF":1.2,"publicationDate":"2022-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12045","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76261435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Q-scheduler: A temperature and energy-aware deep Q-learning technique to schedule tasks in real-time multiprocessor embedded systems","authors":"Mahsa Mohammadi,&nbsp;Hakem Beitollahi","doi":"10.1049/cdt2.12044","DOIUrl":"10.1049/cdt2.12044","url":null,"abstract":"<p>Reducing energy consumption under processors' temperature constraints has recently become a pressing issue in real-time multiprocessor systems on chips (MPSoCs). The high temperature of processors affects the power and reliability of the MPSoC. Low energy consumption is necessary for real-time embedded systems, as most of them are portable devices. Efficient task mapping on processors has a significant impact on reducing energy consumption and the thermal profile of processors. Several state-of-the-art techniques have recently been proposed for this issue. This paper proposes Q-scheduler, a novel technique based on the deep Q-learning technology, to dispatch tasks between processors in a real-time MPSoC. Thousands of simulated tasks train Q-scheduler offline to reduce the system's power consumption under temperature constraints of processors. The trained Q-scheduler dispatches real tasks in a real-time MPSoC online while also being trained regularly online. Q-scheduler dispatches multiple tasks in the system simultaneously with a single process; the effectiveness of this ability is significant, especially in a harmonic real-time system. Experimental results illustrate that Q-scheduler reduces energy consumption and temperature of processors on average by 15% and 10%, respectively, compared to previous state-of-the-art techniques.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 4","pages":"125-140"},"PeriodicalIF":1.2,"publicationDate":"2022-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12044","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79367644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Robustness of predictive energy harvesting systems: Analysis and adaptive prediction scaling","authors":"Naomi Stricker,&nbsp;Reto Da Forno,&nbsp;Lothar Thiele","doi":"10.1049/cdt2.12042","DOIUrl":"10.1049/cdt2.12042","url":null,"abstract":"<p>Internet of Things (IoT) systems can rely on energy harvesting to extend battery lifetimes or even render batteries obsolete. Such systems employ an energy scheduler to optimise their behaviour and thus performance by adapting the system's operation. Predictive models of harvesting sources, which are inherently non-deterministic and consequently challenging to predict, are often necessary for the scheduler to optimise performance. Because the inaccurate predictions are utilised by the scheduler, the predictive model's accuracy inevitably impacts the scheduler and system performance. This fact has largely been overlooked in the vast amount of available results on energy schedulers and predictors for harvesting-based systems. The authors systematically describe the effect prediction errors have on the scheduler and thus system performance by defining a novel robustness metric. To alleviate the severe impact prediction errors can have on the system performance, the authors propose an adaptive prediction scaling method that learns from the local environment and system behaviour. The authors demonstrate the concept of robustness with datasets from both outdoor and indoor scenarios. In addition, the authors highlight the improvement and overhead of the proposed adaptive prediction scaling method for both scenarios. It improves a non-robust system's performance by up to 13.8 times in a real-world setting.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 4","pages":"106-124"},"PeriodicalIF":1.2,"publicationDate":"2022-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12042","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83346208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Synchronization in graph analysis algorithms on the Partially Ordered Event-Triggered Systems many-core architecture","authors":"Ashur Rafiev,&nbsp;Alex Yakovlev,&nbsp;Ghaith Tarawneh,&nbsp;Matthew F. Naylor,&nbsp;Simon W. Moore,&nbsp;David B. Thomas,&nbsp;Graeme M. Bragg,&nbsp;Mark L. Vousden,&nbsp;Andrew D. Brown","doi":"10.1049/cdt2.12041","DOIUrl":"10.1049/cdt2.12041","url":null,"abstract":"<p>One of the key problems in designing and implementing graph analysis algorithms for distributed platforms is to find an optimal way of managing communication flows in the massively parallel processing network. Message-passing and global synchronization are powerful abstractions in this regard, especially when used in combination. This paper studies the use of a hardware-implemented refutable global barrier as a design optimization technique aimed at unifying these abstractions at the API level. The paper explores the trade-offs between the related overheads and performance factors on a message-passing prototype machine with 49,152 RISC-V threads distributed over 48 FPGAs (called the Partially Ordered Event-Triggered Systems platform). Our experiments show that some graph applications favour synchronized communication, but the effect is hard to predict in general because of the interplay between multiple hardware and software factors. A classifier model is therefore proposed and implemented to perform such a prediction based on the application graph topology parameters: graph diameter, degree of connectivity, and reconvergence metric. The presented experimental results demonstrate that the correct choice of communication mode, granted by the new model-driven approach, helps to achieve 3.22 times faster computation time on average compared to the baseline platform operation.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 2-3","pages":"71-88"},"PeriodicalIF":1.2,"publicationDate":"2022-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12041","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85073025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hybrid multi-level hardware Trojan detection platform for gate-level netlists based on XGBoost","authors":"Ying Zhang,&nbsp;Sen Li,&nbsp;Xin Chen,&nbsp;Jiaqi Yao,&nbsp;Zhiming Mao,&nbsp;Jizhong Yang,&nbsp;Yifeng Hua","doi":"10.1049/cdt2.12040","DOIUrl":"10.1049/cdt2.12040","url":null,"abstract":"<p>Coping with the problem of malicious third-party vendors implanting Hardware Trojan (HT) in the circuit design stage, this paper proposes a hybrid-mode gate-level hardware Trojan detection platform based on the XGBoost algorithm. This detection platform is composed of multi-level HT localization and circuit structure based HT detection. Each wire of the circuit is regarded as a node in multi-level HT localization, and static characteristics of nodes are analysed, combining with dynamic detection to locate HT. The network structure features of the circuit are extracted in modular HT structure detection, aiming to identify HT accurately and rapidly. The hybrid-mode HT detection platform can efficiently meet various detection requirements, such as HT localization or rapid and accurate HT detection. The experiment results on Trust-Hub benchmark show that the multi-level localization can achieve 94.0% location accuracy, and the modular HT structure detection accuracy can achieve 100%. The modular HT structure detection is about four times as fast as the multi-level HT localization on feature extraction. Therefore, multi-level localization and modular HT structure detection can be respectively or cooperatively applied for specific HT detection issues, which proves that the proposed hybrid-mode gate-level HT detection scheme is practical and effective.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 2-3","pages":"54-70"},"PeriodicalIF":1.2,"publicationDate":"2022-02-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12040","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87993598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Enhanced overloaded code division multiple access for network on chip","authors":"Behnam Vakili,&nbsp;Morteza Gholipour","doi":"10.1049/cdt2.12039","DOIUrl":"10.1049/cdt2.12039","url":null,"abstract":"<p>The Code-division multiple access (CDMA) method is commonly used as the network infrastructure in multi-core chips. One of its advantages is the simultaneous connection of all network components. Another advantage is the constant delay of this method. On the other hand, one drawback is that the number of transmitters is limited to the number of encoding bits. In this study, the authors used the combination of Walsh codes and their inverses, as well as the simultaneous application of the time-division multiple access (TDMA) method, to increase the transmission capacity of this protocol more than four times the standard mode. In the proposed design, although the circuit area does not increase significantly, a fourfold increase in the throughput of the CDMA network is seen. Using the method proposed in this study, it will be possible to increase the capacity further.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 2-3","pages":"45-53"},"PeriodicalIF":1.2,"publicationDate":"2021-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12039","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81311322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Online multi-object tracking based on time and frequency domain features","authors":"Mahbubeh Nazarloo,&nbsp;Meisam Yadollahzadeh-Tabari,&nbsp;Homayun Motameni","doi":"10.1049/cdt2.12037","DOIUrl":"10.1049/cdt2.12037","url":null,"abstract":"<p>Multi-object tracking (MOT) can be considered as an interesting field in computer vision research. Its application can be found in video motion analysis, smart interfaces, and visual surveillance. It is a challenging issue due to difficulties made by a variable number of objects and interaction between them. In this work, a new method for online MOT based on time and frequency domain features is presented. The features are obtained from the wavelet transform and fractal dimension. The modified cuckoo optimization algorithm is utilized for feature selection, which has the ability such as fast convergence and global optima finding. The features are given for learning vector quantization, which is a supervised artificial neural network (ANN). It is used to classify the dataset. To evaluate the performance of the presented technique, simulations are performed using the ETH Mobile Platform and VS-PETS 2009 datasets. The simulation results show the superiority of the presented technique for MOT compared to earlier studies in terms of accuracy. The mostly tracked values for the datasets are 74.3% and 97.2%, which leads to at least 4.2% and 2.5% better performance according to the other methods, respectively.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 1","pages":"19-28"},"PeriodicalIF":1.2,"publicationDate":"2021-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12037","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76226451","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Sparse convolutional neural network acceleration with lossless input feature map compression for resource-constrained systems","authors":"Jisu Kwon,&nbsp;Joonho Kong,&nbsp;Arslan Munir","doi":"10.1049/cdt2.12038","DOIUrl":"10.1049/cdt2.12038","url":null,"abstract":"<p>Many recent research efforts have exploited data sparsity for the acceleration of convolutional neural network (CNN) inferences. However, the effects of data transfer between main memory and the CNN accelerator have been largely overlooked. In this work, the authors propose a CNN acceleration technique that leverages hardware/software co-design and exploits the sparsity in input feature maps (IFMs). On the software side, the authors' technique employs a novel lossless compression scheme for IFMs, which are sent to the hardware accelerator via direct memory access. On the hardware side, the authors' technique uses a CNN inference accelerator that performs convolutional layer operations with their compressed data format. With several design optimization techniques, the authors have implemented their technique in a field-programmable gate array (FPGA) system-on-chip platform and evaluated their technique for six different convolutional layers in SqueezeNet. Results reveal that the authors' technique improves the performance by 1.1×–22.6× while reducing energy consumption by 47.7%–97.4% as compared to the CPU-based execution. Furthermore, results indicate that the IFM size and transfer latency are reduced by 34.0%–85.2% and 4.4%–75.7%, respectively, compared to the case without data compression. In addition, the authors' hardware accelerator shows better performance per hardware resource with less than or comparable power consumption to the state-of-the-art FPGA-based designs.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"16 1","pages":"29-43"},"PeriodicalIF":1.2,"publicationDate":"2021-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12038","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89983943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}