Geoff V. Merrett, Bernd-Christian Renner, Brandon Lucia
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引用次数: 0
Abstract
In order to realise the vision and scale of the Internet of Things (IoT), we cannot rely on mains electricity or batteries to power devices due to environmental, maintenance, cost and physical volume implications. Considerable research has been undertaken in energy harvesting, allowing systems to extract electrical energy from their surrounding environments. However, such energy is typically highly dynamic, both spatially and temporally. In recent years, there has been an increase in research around how computing can be effectively performed from energy harvesting supplies, moving beyond the concepts of battery-powered and energy-neutral systems, thus enabling battery-free computing.
Challenges in battery-free computing are broad and wide-ranging, cutting across the spectrum of electronics and computer science—for example, circuits, algorithms, computer architecture, communication and networking, middleware, applications, deployments, and modelling and simulation tools.
This special issue explores the challenges, issues and opportunities in the research, design, and engineering of energy-harvesting, energy-neutral and intermittent sensing systems. These are enabling technologies for future applications in smart energy, transportation, environmental monitoring and smart cities. Innovative solutions are needed to enable either uninterrupted or intermittent operation.
This special issue contains two papers on different aspects of battery-free computing, as described below.
Hanschke et al.‘s article on ‘EmRep: Energy Management Relying on State-of-Charge Extrema Prediction’ considers energy management in energy-neutral systems, particularly those with small energy storage elements (e.g. a supercapacitor). They observe that existing energy-neutral management approaches have a tendency to operate inefficiently when exposed to extremes in the harvesting environment, for example, wasting harvested power in times of abundant energy due to saturation of the energy storage device. To resolve this, the authors present an approach to predict extremes in device state-of-charge (SoC) when such conditions are occurring and hence switch to a less conservative and more immediate policy for device activity (and hence, consumption). This decouples energy management of high-intake from low-intake harvest periods and ensures that the saturation of energy storage is reduced by design. The approach is thoroughly experimentally evaluated in combination with a variety of different prediction algorithms, time resolutions, and energy storage sizes. Promising results indicate the potential for a doubling in effective utility in systems with only small energy storage elements.
The second paper in the special issue, authored by Stricker et al., continues the theme of energy prediction by considering the impact of harvesting source prediction errors on the system scheduler and hence the system's performance. Their article, ‘Robustness of Predictive Energy Harvesting Systems - Analysis and Adaptive Prediction Scaling’, defines a new robustness metric to describe the effect that prediction errors have and demonstrates the concept using data sets from both indoor and outdoor harvesting scenarios. The authors subsequently propose an adaptive prediction scaling method that learns from the local environment and system behaviour, demonstrating a performance improvement of up to 13.8 times in a real-world setting.
We hope that this special issue stimulates researchers in both industry and academia to undertake further research in this challenging field.
期刊介绍:
IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.
The key subject areas of interest are:
Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.
Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance.
Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.
Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware.
Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting.
Case Studies: emerging applications, applications in industrial designs, and design frameworks.