International Journal of Numerical Modelling-Electronic Networks Devices and Fields最新文献

{"title":"Effect of temperature dependence of 2DEG on device characteristics of field-plated recessed-gate III-nitride/β-Ga2O3 nano-HEMT","authors":"G. Purnachandra Rao,&nbsp;Trupti Ranjan Lenka,&nbsp;Hieu Pham Trung Nguyen,&nbsp;Nour El. I. Boukortt,&nbsp;Giovanni Crupi","doi":"10.1002/jnm.3281","DOIUrl":"10.1002/jnm.3281","url":null,"abstract":"<p>In this article, a field-plated and recessed gate III-Nitride Nano-HEMT developed on <i>β</i>-Ga₂O₃ substrate is proposed and investigated for various performance characteristics over different temperatures. The 2DEG (Two Dimensional Electron Gas) dependence on temperature is critical for commercial utilization of GaN-based HEMTs (high electron mobility transistors). Here, the temperature influence on 2DEG for proposed HEMT over the range of 300–400 K has been investigated. The results demonstrate that the 2DEG density of proposed HEMT reduces as temperature increases. It has been observed that phonon scattering results in a sharp decline in the mobility of 2DEG as temperature increases, which causes the electric field to decrease. It also exhibited that the cut-off frequency decreased over the temperature changes from 300 to 400 K due to diminution in electron mobility. This research aims to contribute an extensive overview of proposed III-Nitride Nano-HEMT designed on a lattice-matched substrate of <i>β</i>-Ga₂O₃ to foster future research on the latest developments in this field.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141936972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Enhancement of multiplication factor of capacitor using single current follower differential input transconductance amplifier","authors":"Ajishek Raj,&nbsp;Meghana Shrivastava,&nbsp;D. R. Bhaskar,&nbsp;Pragati Kumar","doi":"10.1002/jnm.3279","DOIUrl":"10.1002/jnm.3279","url":null,"abstract":"<p>This paper presents a new circuit approach to realize a capacitance multiplier circuit with positive and negative multiplication factors. Based on this approach, two new implementations of positive and negative grounded capacitance multiplier (GCM) circuits are proposed, which utilize only one current follower differential input transconductance amplifier (CFDITA), in conjunction with only one resistor and one virtually grounded capacitor. The presented GCM circuits can enhance a low capacitance value to a very high value (used in low frequency applications), up to 9202 times its original value. An important aspect of the proposed circuits involves designing a lossy parallel inductor circuit by interchanging the passive elements (RC:CR transformation) with each other. The obtained value of the capacitance and inductance can be controlled independently and electronically through the transconductance of CFDITA. The practical usability of the suggested circuits as first and second order filters is discussed. The functionality of the proposed GCM circuits is validated using CMOS CFDITA implemented with 180 nm TSMC technology parameters. Experimental verification of the proposed circuits and application examples is reinforced through the utilization of CFDITA implemented with readily available ICs AD844 and LM13700. These outcomes emphasize the dependability of the suggested circuits.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141937050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Guest editorial for the special issue on “Artificial intelligence and machine learning based approaches for modeling and design of electronic devices, circuits, and systems”","authors":"Jialin Cai,&nbsp;Chao Yu","doi":"10.1002/jnm.3278","DOIUrl":"10.1002/jnm.3278","url":null,"abstract":"<p>The increasing complexity of wireless communication systems coupled with shorter design cycles has increased the need for modeling and design methodologies that are both accurate and fast. It is, however, extremely difficult to meet these contradictory requirements using conventional computer-aided design (CAD). Over the past few decades, artificial intelligence (AI) and machine learning (ML) techniques have gained popularity in the RF and microwave community and are increasingly being used. Particularly in recent years, there has been an increase in the use of AI and ML methods for the modeling and design of wireless devices, circuits, and systems, including active device modeling, power amplifier modeling and digital predistortion, passive circuit design and optimization, active circuit design and optimization, wireless power transfer, wireless systems design and optimization and more.</p><p>The special issue contains 25 papers that address a variety of topics including AI and ML based device modeling, circuit design and optimization, circuit modeling and digital predistortion, and so forth. Several outstanding contributions to modeling and characterization of electronic devices based on AI and traditional techniques are given.<span>^1-4</span> Additionally, RF circuit design can benefit from AI and ML techniques, including active circuit design, such as PAs<span>^5-9</span> and LNA,<span>^{10, 11}</span> and passive circuit design, such as filters.<span>¹²</span> The use of AI methods has also been extended to the modeling and predistortion of dynamic characteristic of circuits and systems, for example, RF PA modeling,<span>^13-15</span> digital predistortion of high frequency transmitters,<span>¹⁶</span> suppressing nonlinearity in circuits,<span>^{17, 18}</span> and analyzing circuit crosstalk and phased array errors.<span>^{19, 20}</span> Furthermore, AI methods can also be used to detect circuit defects and cracks.<span>^{21, 22}</span> Along with the aforementioned topics, AI and machine learning methods are applied to organic transistors, solar cells, and digital circuit design.<span>^23-25</span></p><p>From the device level up to the system level, this special issue explores the different branches of knowledge that relate to AI and ML for the modeling and design of wireless devices, circuits, and systems. It is our intention to provide a comprehensive overview of these topics from the reader's point of view as well as useful hints for overcoming the technological challenges of the future.</p><p>As Guest Editors, we would like to express our gratitude to Prof. Giovanni Crupi (Editor-in-Chief of <i>Int J Numer Model</i>) for facilitating this special issue. In addition, we would like to thank all authors for their high-quality contributions, as well as all reviewers who took the time and effort to examine the submissions carefully. Readers of ","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/jnm.3278","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141937065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comprehensive characterization of a high-performance double heterojunction InGaAs pHEMT for linear power-efficient amplifiers applications","authors":"Sadia Sultana,&nbsp;Jannatul Naima,&nbsp;Md. Shamsul Alam,&nbsp;Md. Shah Alam,&nbsp;Giovanni Crupi,&nbsp;Mohammad A. Alim","doi":"10.1002/jnm.3277","DOIUrl":"10.1002/jnm.3277","url":null,"abstract":"<p>This article centers its attention on the phenomenon of electrostatics, linearity, analogue, and RF performance of a 0.5 μm × (2 × 100) μm double heterojunction AlGaAs/InGaAs/GaAs pHEMT using on-wafer DC and RF measurements up to 50 GHz. With a high I_ON/I_OFF ratio (1.21 × 10⁷) and low subthreshold slope (72.7 mV/dec), a flat and high transconductance over a wide range of <i>V</i>_gs has been achieved for the tested device. Furthermore, the input intercept and higher-order voltage intercept point both attained large values with low intermodulation and harmonic distortion. Regarding RF parameters, the intrinsic gain has been achieved up to 28 dB. The GBW up to 750 GHz was attained, with the highest <i>f</i>_T and <i>f</i>_max values being 24.5 GHz and 99.3 GHz, respectively. Since the device has very low intrinsic capacitance, parameters like TFP, GFP, and GTFP also showed excellent results. The high intrinsic gain and TGF indicate ample potential of the device for use as an amplifier. Investigating the parameters reveals the device to have very good linearity and amplifying capability.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141936970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Harmonic balance applied to a 2D nonlinear finite-element magnetic model with motion and circuit coupling","authors":"Elia Scolaro,&nbsp;Luigi Alberti,&nbsp;Ruth V. Sabariego,&nbsp;Johan Gyselinck","doi":"10.1002/jnm.3275","DOIUrl":"10.1002/jnm.3275","url":null,"abstract":"<p>In this work, the harmonic balance approach is applied to a 2D nonlinear finite-element magnetic model with motion, coupled to a nonlinear circuit. The case study comprises a six-pole three-phase surface-mounted permanent magnet generator connected to a six-pulse full-wave diode bridge rectifier. Simulations are performed at fixed generator speed in two operating cases: with an open-circuit DC bus and supplying a load resistance. Both time stepping and harmonic balance approaches are deeply discussed focusing on the model under study, along with relevant implementation details. Harmonic balance results are compared with benchmark time stepping simulations in terms of voltage and current waveforms, progressively expanding the harmonic spectrum. The computational cost of the two approaches is reported as well. Simulation accuracy is satisfying with regard to time stepping benchmark results: relative errors on total harmonic distortion and global root-mean-square values are lower than 3% and 1%, respectively. However, the time stepping approach outperforms the harmonic balance one, due to the relatively short initial transient of the chosen case study. Further improvements on practical implementation are needed to exploit the potentialities of harmonic balance technique.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141864858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Analog and linearity performance analysis of ferroelectric vertical tunnel field effect transistor with and without source pocket","authors":"Ashish Kumar Singh,&nbsp;Ramesh Kumar,&nbsp;Heranmoy Maity,&nbsp;Prabhat Singh,&nbsp;Sarabdeep Singh","doi":"10.1002/jnm.3274","DOIUrl":"10.1002/jnm.3274","url":null,"abstract":"<p>This study examines the electrical performance characteristics of a ferroelectric vertical tunnel field-effect transistor (TFET) with and without a source pocket (Si_0.5Ge_0.5). The incorporation of Germanium in the source of the TFET aims to enhance the on-current. The Silvaco TCAD simulation tool is utilized to simulate the proposed structure. To improve device performance, a ferroelectric layer with a vertical length is employed in the gate of the TFET. When the ferroelectric layer partially controls the channel region, device characteristics, such as on-current and subthreshold swing (SS) can be improved (i.e., <i>I</i>_ON = 15.21 × 10⁻⁵ A/μm, <i>I</i>_ON/<i>I</i>_OFF = 5.03 × 10⁹, and a minimum SS of 20.87 mV/decade at 300 K). This article studied a comparison between ferroelectric vertical TFETs and nonferroelectric vertical TFETs, as well as ferroelectric vertical TFETs with and without source pockets. The comparison is done on the basis of DC and RF parameters. Analysis of this comparison represents that ferroelectric vertical TFET with source pocket has improved characteristics.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141865037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Computational modeling of uniaxial antiferroelectric and antiferroelectric-like actuators","authors":"Binh H. Nguyen,&nbsp;Véronique Rochus","doi":"10.1002/jnm.3273","DOIUrl":"10.1002/jnm.3273","url":null,"abstract":"<p>Recently, antiferroelectric and antiferroelectric-like materials have regained interest in electronic devices, such as field-effect transistors, memory, and transducers. Particularly in micro/nano-electromechanical coupling systems such as actuators, these innovative materials, with their peculiar phase transition between antiferroelectric and ferroelectric phases, show promise in offering large electro-strain, fast response, and low power consumption devices. However, compared to numerous computational models of ferroelectric actuators, numerical modeling of antiferroelectric and antiferroelectric-like actuators remains relatively unexplored. In this paper, we propose a phenomenological model of uniaxial antiferroelectric and antiferroelectric-like actuators based on their switching polarization behavior. Specifically, both the double hysteresis loop of antiferroelectric materials and the pinched hysteresis loop of antiferroelectric-like materials can be captured by two hyperbolic tangent functions. This allows us to cast a polarization-dependent strain and piezoelectric tensor into the constitutive laws. The proposed model is then implemented into a finite element framework, in which the voltage-induced deformation can be solved using the Newton–Raphson procedure. Numerical examples of both antiferroelectric and antiferroelectric-like actuators are illustrated and compared with experimental data, showing our proposed model can serve as a useful tool for the design and development of antiferroelectric and antiferroelectric-like actuators.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141769410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A dimensionally reduction approach to study kink soliton and its fission and fusion process of (3+1)-dimensional KdV-CDG equation","authors":"Mati ur Rahman,&nbsp;Mei Sun,&nbsp;Mehdi Salimi,&nbsp;Ali Ahmadian","doi":"10.1002/jnm.3271","DOIUrl":"10.1002/jnm.3271","url":null,"abstract":"<p>The Hirota bilinear (HB) is a powerful and widely used technique to find various types of solitons of integrable systems. In this manuscript, we implement HB technique to find bilinear form of a dimensionally reduced (3+1)-dimensional KdV–Calogero–Bogoyavlenskii–Schiff (KdV-CBS) equation at <i>z</i> = <i>x</i>, <i>z</i> = <i>y</i>, and <i>z</i> = <i>t</i>. We present various results for distinct auxiliary function to study kink solitons and its fission and fusion dynamics. The MATLAB-2020 is used to display all the results via 3D and line 2D graphs for appropriate values of parameters. These findings provide a strong new insight into the nonlinear features of the model and lay the foundation for future studies in soliton dynamics and nonlinear events in related systems.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141769486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Transistor modeling based on LM-BPNN and CG-BPNN for the GaAs pHEMT","authors":"Qian Lin,&nbsp;Shuyue Yang,&nbsp;Ruilan Yang,&nbsp;Haifeng Wu","doi":"10.1002/jnm.3268","DOIUrl":"10.1002/jnm.3268","url":null,"abstract":"<p>In order to address the challenges of complex process and low precision in traditional device modeling, double hidden layer back propagation neural network (BPNN) are trained using the conjugate gradient (CG) algorithm and the Levenberg–Marquardt (LM) algorithm, the CG-BPNN and LM-BPNN models of small signal for gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) are obtained and analyzed here. At first, the scattering parameters (S-parameters) of GaAs pHEMT are divided into training set and test set randomly. Experimental results show that the CG-BPNN model is better than another S-parameters when predicting ImS₁₂ with mean square error (MSE) of 7.6632e-06, while LM-BPNN model predicts ImS₁₂ with MSE of 2.4672e-06. Meanwhile, the MSE of CG-BPNN model is higher than LM-BPNN model when predicting all the S-parameters. In addition, it shows a smaller fluctuation range for the error curve of LM-BPNN model, which is more stable than the CG-BPNN model. Therefore, the double hidden layer LM-BPNN model is the better choice to characterize the small signal of GaAs pHEMT.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141769334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Synthesis of concentric circular antenna array for reducing the sidelobe level by employing sine cosine optimization algorithm","authors":"Nageswar Rao Thadikamalla,&nbsp;Prakasa Rao Amara","doi":"10.1002/jnm.3272","DOIUrl":"10.1002/jnm.3272","url":null,"abstract":"<p>The sine cosine algorithm (SCA), a meta-heuristic optimization method, is used in this study to provide a precise linear and elliptical antenna array design for synthesizing the ideal far-field radiation pattern in the fifth-generation (5G) communication spectrum. The wireless communication system will undergo dramatic changes thanks to the forthcoming 5G technology, which offers exceptionally high data rates, increased capacity, reduced latency, and outstanding service quality. The most important component of 5G communications is an accurate antenna array design for an optimum far-field radiation pattern synthesis with a suppressed sidelobe level (SLL) value and half power beam width (HPBW). While long-distance communication necessitates a low HPBW, the entire side lobe area needs a suppressed SLL to prevent interference. The SCA is used in this case to the optimal feeding currents applied to each array member in the design examples of the concentric circular antenna arrays (CCAA) discussed in this article. It shows the litheness and attainment of the propound algorithm named SCA, chosen CCAAs with three rings and varying amounts of components or antenna array sets those are stated as follows: Set I (4, 6, 8 elements), Set II (8, 10, 12 elements), Set III (6, 12, 18 elements), Set IV (8, 14, 20 elements) with and without the center element are amalgamate. Apply the PSO, Jaya, and SCA optimization algorithms for all four Sets of antenna arrays and compare the attained results; the SLL values achieved by the SCA technique are contrasted with those of other current optimization techniques. The outcomes of all examinations reveal that the SCA algorithm achieved a superior SLL reduction over other optimization techniques.</p>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":null,"pages":null},"PeriodicalIF":1.6,"publicationDate":"2024-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141769324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}