International Journal of Numerical Modelling-Electronic Networks Devices and Fields最新文献

{"title":"RETRACTION: An Optimal Hybrid Control Scheme to Achieve Power Quality Enhancement in Micro Grid Connected System","authors":"","doi":"10.1002/jnm.70031","DOIUrl":"https://doi.org/10.1002/jnm.70031","url":null,"abstract":"<div>\u0000 \u0000 <section>\u0000 \u0000 <p>\u0000 <b>RETRACTION:</b> <span>P. Rajesh</span>, <span>F. H. Shajin</span>, <span>B. Rajani</span>, and <span>D. Sharma</span>, “ <span>An Optimal Hybrid Control Scheme to Achieve Power Quality Enhancement in Micro Grid Connected System</span>,” <i>International Journal of Numerical Modelling</i> <span>35</span>, no. <span>6</span> (<span>2022</span>): e3019, https://doi.org/10.1002/jnm.3019.\u0000 </p>\u0000 </section>\u0000 \u0000 <section>\u0000 \u0000 <p>The above article, published online on 06 May 2022 in Wiley Online Library (wileyonlinelibrary.com), has been retracted by agreement between the journal Editor-in-Chief, Giovanni Crupi; and John Wiley &amp; Sons, Ltd. The retraction has been agreed due to significant unattributed overlap between this article and a previously published article by different authors [1]. The authors disagree with the retraction.</p>\u0000 </section>\u0000 \u0000 <section>\u0000 \u0000 <h3> References</h3>\u0000 \u0000 <p>\u0000 [1] <span>J. Suresh</span> and <span>V. Ganesh</span>, <span>\"An IBSMF Optimization Technique used Distribution system with Renewable Energy Sources,” IOP Conference Series: Materials Science and Engineering</span> <span>623</span> (<span>2019</span>): 012013, https://doi.org/10.1088/1757-899X/623/1/012013.\u0000 </p>\u0000 </section>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/jnm.70031","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143836038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"CAAODT: Collaborated AOA and ASBO Optimization-Based Design Technique for Electrically Thick Circularly Polarized Rectangular Microstrip Antennas","authors":"Geetanjali Singla,&nbsp;Amandeep Kaur,&nbsp;Amit Mittal,&nbsp;Manjinder Singh,&nbsp;Varun Malik,&nbsp;Ruchi Mittal","doi":"10.1002/jnm.70030","DOIUrl":"https://doi.org/10.1002/jnm.70030","url":null,"abstract":"<div>\u0000 \u0000 <p>Circularly polarized antennas are crucial for wireless systems due to their effectiveness in avoiding fading and multi-path interference. However, existing design techniques lack flexibility for varying frequencies and are costly due to complex fabrication. To overcome those challenges, this paper intends to propose a new Collaborated AOA and ASBO optimization-based Design Technique (CAAODT)-based Circularly Polarized Rectangular Microstrip Antenna (MSA) design technique that improves performance and flexibility for these antennas. The optimization of design parameters such as radius, height, ground plane length, ground plane width, and thickness is achieved using a novel algorithm called the Collaborated AOA and ASBO optimization (CAAO). Here, AOA is called as Archimedes Optimization Algorithm. ASBO is called Average and Subtraction-Based Optimization. This tuning process considers constraints like Axial Ratio, gain, bandwidth, Voltage Standing Wave Ratio (VSWR), and return loss. The proposed optimal design model is validated against traditional methods based on gain, VSWR, return loss, bandwidth, and axial ratio across different frequencies.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143836040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"One-Sided Schmitt Trigger-Based 11T Carbon Nanotube Field Effect Transistor—Based Static Random-Access Memory Cell for Modern IoT Embedded Devices at 32 nm Technology","authors":"Srinivasan Jayanthi,&nbsp;Periyasamy Raja","doi":"10.1002/jnm.70049","DOIUrl":"https://doi.org/10.1002/jnm.70049","url":null,"abstract":"<div>\u0000 \u0000 <p>Researchers are working to develop a static random-access memory (SRAM) cell that consumes less power, is highly stable, and operates at high speed. This paper proposes a new one–sided Schmitt-trigger based 11 transistor (ST11T) SRAM cell using carbon nanotube field effect transistors (CNTFET) with the loop cutting transistor technique. The ST inverter, along with the read decoupled and loop cutting technique, leads to low power consumption, better stability, and low access times during its operation modes. Simulation results conducted using the Stanford university 32 nm CNTFET technology in the HSPICE simulator with <i>V</i>_DD = 0.9 V demonstrate that the proposed ST11T shows an improvement of 99.9% in hold power compared to CONV6T, DBB7T, and CONV8T designs. The proposed cell's topology achieves a remarkable 99.9% improvement in read power compared to all the cells analyzed in this study and demonstrates a significant 96.96% enhancement in write power efficiency when compared to the SPI11T design. Also, the WSNM/RSNM of the cell is witnessed to improve by 1.35X/1.58X times its CONV6T counterpart and hence improving its stability In the nanometer regime, variations in process, voltage, and temperature (PVT) significantly impact performance parameters such as power, stability, and delay. The proposed ST11T SRAM cell has been evaluated under PVT variations and compared with state-of-the-art SRAM cells used in this study. Results indicate that the proposed SRAM cell exhibits exceptional stability and reliability despite PVT fluctuations. These simulations confirm the effectiveness and efficiency of the ST11T SRAM cell, positioning it as a highly suitable option for modern IoT embedded devices.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143827043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modeling and Simulation of CMOS Schmitt Trigger Circuits Using a Multi-Objective Mayfly Optimization Algorithm","authors":"Ahmad Abuelrub,&nbsp;Fadi Nessir Zghoul,&nbsp;Haneen Alteehi,&nbsp;Bayan Bany Fawaz","doi":"10.1002/jnm.70047","DOIUrl":"https://doi.org/10.1002/jnm.70047","url":null,"abstract":"<div>\u0000 \u0000 <p>Schmitt Trigger Circuits (STCs) play a crucial role in digital and analog signal processing by providing noise immunity and stable switching behavior. However, optimizing STC performance for low-power, high-speed applications remains a challenging task. This study proposes a novel approach using the Multi-Objective Mayfly Optimization Algorithm (MOMA) to optimize key STC parameters, including power dissipation, propagation delay, and hysteresis voltage. The optimization process was conducted using MATLAB, whereas LTSpice was employed for circuit-level validation using 0.25 μm/2.5 V CMOS technology. To identify the best trade-off solutions, various weighting methods were applied, including Statistical Variance, Standard Deviation, CRITIC, and Mean methods, ensuring a balanced evaluation of circuit performance. Numerical results show that the optimized STC achieved a 23% reduction in propagation delay, a 38% decrease in power dissipation, and improved noise immunity while maintaining robust switching characteristics. These findings confirm the effectiveness of MOMA in designing low-power, high-performance STCs suitable for modern VLSI, biomedical, and IoT applications.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143818446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modeling Single Event Transient in 28 Nm FDSOI MOSFETs Using a Neural Network Approach","authors":"Jiaxin Chen,&nbsp;Ting Xu,&nbsp;Xinyi Zhang,&nbsp;Bo Li,&nbsp;Lei Wang,&nbsp;Jianhui Bu","doi":"10.1002/jnm.70050","DOIUrl":"https://doi.org/10.1002/jnm.70050","url":null,"abstract":"<div>\u0000 \u0000 <p>It's hard to accurately consider various operating factors for the traditional single event transient (SET) SPICE modeling. This paper proposes a novel method based on a neural network. The proposed method can unify the intricate data correlations among drain voltage, linear energy transfer (LET), temperature, strike position, time, and drain transient current in a single model with high accuracy. Technology computer aided design (TCAD) simulation is used to get the original SET data for training. The genetic algorithm (GA) optimized back propagation (BP) neural network established herein has a root mean square error (RMSE) of less than 2.0042%. This optimized neural network is converted to the SET current SPICE model through the Verilog-A language, and its practicality has been verified through circuit simulation of a two-input NAND gate.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143801701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A High-Precision and Fast Modeling Method for Amplifiers","authors":"Jun Sun,&nbsp;Shaohua Zhou,&nbsp;Qian Lin","doi":"10.1002/jnm.70051","DOIUrl":"https://doi.org/10.1002/jnm.70051","url":null,"abstract":"<div>\u0000 \u0000 <p>To improve the modeling accuracy and speed of the ExtraTrees model, this paper proposes the CS-ExtraTrees model and verifies the effectiveness of the model based on the measured data of the designed microwave amplifier. The modeling results show that: compared with the Gradient Boosting, Random Forest, and ExtraTrees models, the CS-ExtraTrees model proposed in this paper can improve the modeling accuracy and speed by an order of magnitude. This shows that the CS algorithm has broad application prospects in the field of microwave/radio frequency (RF) devices and circuit modeling and optimization.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143809406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design and Performance Analysis of Walrus Optimization Algorithm (WaOA)-Based Cascade Controller for Load Frequency Control of a Multi-Area Power System With Renewable Sources","authors":"Jahanzeab Hussain,&nbsp;Runmin Zou,&nbsp;Zhenlong Wu,&nbsp;Pawan Kumar Pathak,&nbsp;Samina Akhtar","doi":"10.1002/jnm.70046","DOIUrl":"https://doi.org/10.1002/jnm.70046","url":null,"abstract":"<div>\u0000 \u0000 <p>One of the key challenges in interconnected power systems is developing an effective control strategy to mitigate frequency and power deviations caused by the intermittency of renewable energy sources (RESs) and varying load demands. This research introduces an innovative cascade control strategy featuring a PPD controller followed by a PI controller (PPD-PI) for load frequency control (LFC) in a two-area power system with photovoltaic (PV), wind, and thermal reheat power sources. The walrus optimization algorithm (WaOA) is employed to fine-tune the parameters of both the PIDn and PPD-PI controllers, with the goal of minimizing the integral time absolute error (ITAE). The study first applies the WaOA-tuned PID with filter (PIDn) controller to showcase WaOA's effectiveness in LFC, achieving the lowest objective function value of 0.3862, surpassing MFO (0.3921) and GA (0.4127). The robustness of the WaOA-tuned PPD-PI controller is then evaluated under various conditions, including step load disturbances, random load patterns, and parameter uncertainties. The proposed controller achieves significant improvements, with a 36.8% reduction in ITAE compared to the second-best CGO-tuned PIDn-PI controller in Case 2, and a 54.45% reduction in ITAE compared to the second-best COA-tuned PDn-PI controller in Case 3. To further highlight the advantages of the proposed scheme, the analysis also includes nonlinearities such as governor dead band (GDB), boiler dynamics (BD), and generation rate constraints (GRC), along with sensitivity analysis and stability testing under a <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mo>±</mo>\u0000 <mn>25</mn>\u0000 <mo>%</mo>\u0000 </mrow>\u0000 <annotation>$$ pm 25% $$</annotation>\u0000 </semantics></math> change in system parameters. The results strongly demonstrate the superior performance of the WaOA-optimized PPD-PI controller over existing methods.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143793408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Lateral Si/Si1-xGex/Si Channel Heterostructure Charge Plasma Nanowire JLFET to Eliminate the Effects of Variation of Geometrical Dimensions","authors":"Anchal Thakur,&nbsp;Prashant Mani,&nbsp;Prabin Kumar Bera,&nbsp;Nishant Srivastava,&nbsp;Girish Wadhwa,&nbsp;Antonino Proto","doi":"10.1002/jnm.70042","DOIUrl":"https://doi.org/10.1002/jnm.70042","url":null,"abstract":"<div>\u0000 \u0000 <p>In this article, a charge plasma (CP) based doping-less (DL) nanowire junctionless field effect transistor (NW JLFET) has been investigated for better immunity against geometrical dimension variation from a low power application perspective. SiGe source/drain and Si/SiGe/Si heterostructure channel have been used to improve the electrostatics in the channel to reduce the leakage current. With this doping-less structure, the concept of charge plasmas has been incorporated by selecting electrodes with appropriate work functions. In addition to a low thermal budget, the doping-less devices are easier to fabricate, have a reduced random fluctuation effect, and offer a low cost per unit. The doping-less structure also offers improved mobility and higher current flow. The proposed device is compared with the conventional SiGe nanowire junctionless FET. When both devices are compared, lateral Si/SiGe/Si CP DL NW JLFET shows fewer changes in geometrical dimension variation in terms of germanium content <i>x</i>, nanowire thickness (<i>t</i>_si) and doping profile (<i>N</i>_d) on the drain current (<i>I</i>_DS), <i>I</i>_ON/<i>I</i>_OFF ratio, threshold voltage (<i>V</i>th), drain-induced barrier lowering (DIBL), and subthreshold slope (SS). A drain current model for lateral Si/SiGe/Si CP DL NW JLFET has also been developed in this paper, which includes the impact of the charge plasma technique. The impact of geometrical dimension variation on the analog characteristics of both devices has been studied in terms of like transconductance (<i>g</i>_m) and transconductance gain factor (TGF) (<i>g</i>_m/<i>I</i>_DS). Thus, in the lateral Si/SiGe/Si CP DL NW JLFET, the charge plasma technique along with channel engineering solves the problem of geometrical dimension variation without affecting the inherited properties of junctionless devices.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143793407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Triple RESURF Si/SiC HeteroJunction LDMOS and Its Analytical Model","authors":"Nan Wang,&nbsp;Xiarong Hu,&nbsp;Yonggen Xu,&nbsp;Tianci Li","doi":"10.1002/jnm.70039","DOIUrl":"https://doi.org/10.1002/jnm.70039","url":null,"abstract":"<div>\u0000 \u0000 <p>In this paper, a Triple RESURF Si/SiC HeteroJunction LDMOS (TR-HJ-LDMOS) structure is proposed. The TR-HJ-LDMOS features a P-type layer buried deep into the drift region. Compared with Double RESURF (DR) and Single RESURF (SR) Si/SiC HeteroJunction LDMOS (HJ-LDMOS), the drift depletion effect is strengthened. As a result, the drift doping concentration is increased, and the specific on-resistance (<i>R</i>_s,on) is decreased. The simulation results show that the <i>R</i>_s,on of the 300 V-class TR-HJ-LDMOS is 20mΩ·cm², which is reduced by 28.6% and 50.0%, respectively, compared with DR-HJ-LDMOS and SR-HJ-LDMOS. Moreover, an analytical model for the electric field distributions of the Triple RESURF Si/SiC HeteroJunction LDMOS is proposed in this paper. The analytical expressions of the surface field and potential distributions are presented. The effect of the P-layer concentration, thickness, position, as well as the drain depth and drift thickness on the electric field distributions of the TR-HJ-LDMOS are discussed in detail. The proposed model can also be applied in the SR and DR HJ-LDMOS.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143749774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"FDTD Simulation for Optimization of 3D Two-Layered Au Nanocone SERS Substrates","authors":"Songya Cui,&nbsp;Dongxue Han,&nbsp;Guang Chen,&nbsp;Yufeng Yu,&nbsp;Liang Peng","doi":"10.1002/jnm.70048","DOIUrl":"https://doi.org/10.1002/jnm.70048","url":null,"abstract":"<div>\u0000 \u0000 <p>Surface-enhanced Raman spectroscopy has emerged as a powerful tool for molecular detection, with 3D-nanostructured substrates offering significant advantages in sensitivity enhancement and reproducibility. In this study, finite-difference time-domain methods were performed to optimize the design of 3D two-layered Au nanocone SERS substrates. The electric (E) field distribution and enhancement were systematically analyzed for different nanocone configurations, including variations in the number of nanocones per layer. The results demonstrate that these substrates significantly amplify the E-field intensity, primarily due to multiple plasmon coupling modes. Notably, the E-field strength is approximately 1.5 times higher than that of the single primary Au nanocones. Furthermore, the simulations reveal that E hot spots are predominantly localized at the tips of the nanocones, where the highest field intensities are observed. These findings provide valuable insights for the rational design of high-performance 3D SERS substrates and highlight the potential of two-layered Au nanocone arrays for advanced molecular sensing applications.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 2","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143749854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}