{"title":"Multilayer Neural Networks Enhanced With Hybrid Methods for Solving Fractional Partial Differential Equations","authors":"Amina Hassan Ali, Norazak Senu, Ali Ahmadian","doi":"10.1002/jnm.70073","DOIUrl":"https://doi.org/10.1002/jnm.70073","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper introduces a novel multilayer neural network technique to solve partial differential equations with non-integer derivatives (FPDEs). The proposed model is a deep feed-forward multiple layer neural network (DFMLNN) that is trained using advanced optimization approaches, namely adaptive moment estimation (Adam) and limited-memory Broyden-Fletcher-Goldfarb-Shanno (L-BFGS), which integrate neural networks. First, the Adam method is employed for training, and then the model is further improved using L-BFGS. The Laplace transform is used, concentrating on the Caputo fractional derivative, to approximate the FPDE. The efficacy of this strategy is confirmed through rigorous testing, which involves making predictions and comparing the outcomes with exact solutions. The results illustrate that this combined approach greatly improves both precision and effectiveness. This proposed multilayer neural network offers a robust and reliable framework for solving FPDEs.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 4","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144551014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"QUDEN: A Matlab Package for First-Principles Quantum-Transport Engineering of 2D Material-Based Nanodevices","authors":"Mislav Matić, Mirko Poljak","doi":"10.1002/jnm.70079","DOIUrl":"https://doi.org/10.1002/jnm.70079","url":null,"abstract":"<div>\u0000 \u0000 <p>The simulation of nanotransistors and the inclusion of all relevant physics is a challenging task, especially when working with one-dimensional (1D) nanomaterials in which quantum confinement strongly influences the material properties and device performance. Several groups have already developed state-of-the-art quantum transport simulators based on the first principles non-equilibrium Green's function (NEGF) formalism, and a few have been commercialized. However, these tools are computationally demanding as they require solving the NEGF and the 3D Poisson equation. Here we present an open-source quantum-transport solver for the first principles device engineering for nanoelectronics (QUDEN) implemented in <span>Matlab</span>. QUDEN uses NEGF and the ballistic top-of-the-barrier model to simulate ultrascaled field-effect transistors (FETs) with channels made of nanoribbons of 2D materials, while the device Hamiltonian is obtained using first principles density functional theory (DFT) in combination with maximally localized Wannier functions (MLWFs). This approach preserves the accuracy of the full NEGF-3D Poisson simulation in the on-state while using a simplified self-consistent electrostatics that leads to a much lower computational burden. Taking monolayer germanium-selenide (GeSe) nanoribbons as an example, we show that QUDEN can be used for fast screening and accurate evaluation of numerous 2D/1D materials for future FETs.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 4","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144551015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of Fe-Based Amorphous/Nanocrystalline Alloys for Electromagnetic Interference Mitigation","authors":"Yimin Guo, Rujun Ma, Yuan Li, Xinrong Chi, Kunyu Chen, Tengyun Su, Yuchen Wei, Ziwei He, Miaonan Liu, Junyi Xiong, Wenxi Zhao, Xiaoqiang Li, Qingyu Wang, Xuchao Wang, Zhi Sun, Bing Liu, Xiaoyue Zhang, Xin He, Lingrui Zheng, Peng Qin","doi":"10.1002/jnm.70076","DOIUrl":"https://doi.org/10.1002/jnm.70076","url":null,"abstract":"<div>\u0000 \u0000 <p>Growing concerns about electromagnetic radiation from communication technologies such as 5G have prompted a search for effective microwave-absorbing materials to mitigate potential health risks. This study focuses on the development of Fe-based amorphous/nanocrystalline alloys as microwave absorbers, with specific emphasis on achieving cost-effectiveness, reduced thickness, and superior absorption capabilities. FePC alloy powders, treated through thermal annealing and ball milling (synergistic processing), exhibit enhanced saturation magnetization and superior microwave absorption properties. The powders, with small particle sizes and high surface areas, demonstrate excellent absorption, achieving a minimum reflection loss (RL) of −30.1 dB at 12.8 GHz with a 5.3 GHz absorption bandwidth at 2 mm thickness. The results highlight the promising potential of these materials for practical applications in reducing electromagnetic interference, offering a combination of high performance, low cost, and easy processing.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 4","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144550905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Charumathi, N. B. Balamurugan, M. Suguna, D. Sriram Kumar
{"title":"Multiobjective Design and Performance Evaluation of III–V High-k Surrounding Gate Tunnel Field Effect Transistors Using Machine Learning Approaches","authors":"V. Charumathi, N. B. Balamurugan, M. Suguna, D. Sriram Kumar","doi":"10.1002/jnm.70072","DOIUrl":"https://doi.org/10.1002/jnm.70072","url":null,"abstract":"<div>\u0000 \u0000 <p>In this work, utilising the MultiObjective Optimisation (MOO) framework, III–V tunnel field effect transistors with surrounding gate (III–V TFETs [SG]) have been designed to optimise speed, power and variation for improved device logic parameters. III–V TFET are enhanced by combining the advantages of high-k Hafnium dioxide (HfO<sub>2</sub>) dielectric and surrounding gate technologies. III–V TFETs (SG) have collaborated with indium arsenide (InAs) and gallium antimonide (GaSb) to offer better electron mobility, which further improves device performance. By augmenting the MOO framework and machine learning (ML) methods, we have performed the optimisation of III–V high-k TFETs with surrounding gate (III–V high-k TFETs [SG]) by efficiently handling the competing targets. Two advanced MOO algorithms—Non-Dominated Sorting (NS) Genetic Algorithm-III (GA-III) and Pareto Active-Learning Algorithm (PA-L)—are examined. Moreover, it has been demonstrated that ML-based MOO can automatically identify the best solutions for III–V high-k TFETs with Surrounding Gate, influencing the development of the next generation of nanoscale transistors.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 4","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144367244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vikas Ambekar, A. Theja, Meena Panchore, Chithraja Rajan, Bhumika Neole
{"title":"Investigation of ITC Impact on Negative Bias HJVTFET for Implementing Universal Logic Gates","authors":"Vikas Ambekar, A. Theja, Meena Panchore, Chithraja Rajan, Bhumika Neole","doi":"10.1002/jnm.70057","DOIUrl":"https://doi.org/10.1002/jnm.70057","url":null,"abstract":"<div>\u0000 \u0000 <p>The objective of this study is to examine how interface trap charges (ITC) influence the logic performance of a <i>p</i>-type heterojunction vertical TFET structure without and with gate overlap (HJVTFET-WOG and HJVTFET-WG). The logic gates can be realized with the help of the HJ-VTFET that uses germanium as the source material. Using HJVTFET-WOG and HJVTFET-WG structures, our simulations have proven that two-input universal logic functions like NAND and NOR gates may be realized. By adjusting the gate-source overlap region and choosing the right silicon body thickness, the suggested vertical TFET is able to perform logic operations. For verifying the universal gate functionality, the HJVTFET drain current characteristic and energy band diagram are analyzed by considering the effect of trapped charges. The tunneling width of logic functions is narrower when the ITC is positive and wider when it is negative, and the effective sub-threshold slopes (SS) have been examined. It has been discovered that positive ITCs can enhance device capabilities, while negative ITCs lead to diminishing functionality. The suggested HJVTFET-WOG structure is a promising structure for implementing the logic gates for digital application under the influence of interface trap charges because its electrical performance is less vulnerable to ITC than HJVTFET-WG.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Physics Informed Neural Network Method for Solving Delay Hilfer Fractional Differential Equations","authors":"Parisa Rahimkhani, Sedigheh Sabermahani, Hossein Hassani","doi":"10.1002/jnm.70070","DOIUrl":"https://doi.org/10.1002/jnm.70070","url":null,"abstract":"<div>\u0000 \u0000 <p>In this research, a machine learning method based on physics informed neural network and fractional-order Genocchi wavelets (FGWs) as activation function is explored to solve delay Hilfer fractional differential equations (DHFDEs). In this machine learning algorithm, the FGWs and <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mi>sinh</mi>\u0000 </mrow>\u0000 <annotation>$$ sinh $$</annotation>\u0000 </semantics></math> functions are used as kernel functions to approximate the solution of DHFDEs. In fact, the solution of DHFDEs is approximated as a combination of the mentioned kernel functions and a set of weights that are learned during the fitting process. We apply the roots of the Legendre functions as training data to develop the algorithm. Then, the training is proposed using the optimizer algorithm. In addition, the error bound of the presented strategy is discussed. Finally, to illustrate the validity and feasibility of our results, three numerical simulation along with several tables and figures are utilized.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144273129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Haifa Bahri, Rached Ben Mehrez, Faouzi Nasri, Lilia El Amraoui, Nejeh Jaba
{"title":"The Impact of Temperature Variations on the Electrical Performance of SOI FinFET Devices","authors":"Haifa Bahri, Rached Ben Mehrez, Faouzi Nasri, Lilia El Amraoui, Nejeh Jaba","doi":"10.1002/jnm.70069","DOIUrl":"https://doi.org/10.1002/jnm.70069","url":null,"abstract":"<div>\u0000 \u0000 <p>The temperature-dependent self-heating effect (SHE) is critical for both accurate modeling and selecting optimal operating conditions, as elevated temperatures can compromise device reliability. These days, technology trends toward the miniaturization of electronic devices. As a result, device size decreases, and the packing density of a circuit at the integrated level increases. The combination of these two trends leads to an increase in power density and circuit temperature. For these reasons, our work aims to develop an electrothermal simulation of 20-nm SOI-FinFET. To rigorously analyze electrical behavior, we developed a mathematical framework integrating the ballistic-diffusive equation (BDE). The proposed model is validated by comparing simulated IDS-VGS characteristics with experimental data, demonstrating strong agreement. The SHE is related to thermal design, which is considered a basic procedure in modern microelectronics technology, measuring devices, and a series of modeling simulations and computer analysis of devices. “OFF” is not totally “OFF,” we have demonstrated the evolution of OFF-current (I<sub>off</sub>) with device temperature and the impact of temperature in 20-nm SOI-FinFET on the subthreshold swing (SS) with both V<sub>GS</sub> = 0.8 V and V<sub>DS</sub> = 0.8 V.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144264400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Hybrid Electromagnetic Algorithm for Reconstructing 2-D Dielectric Objects Based on the M-Net","authors":"Ming Jin, Chun Xia Yang, Mei Song Tong","doi":"10.1002/jnm.70071","DOIUrl":"https://doi.org/10.1002/jnm.70071","url":null,"abstract":"<div>\u0000 \u0000 <p>The electromagnetic inverse scattering problem is highly nonlinear and ill-posed, often requiring iterative optimization with regularization terms. In this paper, we propose an enhanced U-Net called M-Net that combines multi-feature input and weighted output layers with an improved loss function calculation method to improve network performance. Given the intimate connection between inverse scattering and forward scattering, this paper devotes some space to demonstrate the effectiveness of neural networks in solving electromagnetic forward problems. The lack of rigorous theoretical derivation poses challenges in ensuring the reliability of neural network output results, thereby limiting its application in electromagnetic problems. In this paper, instead of the scattered field, we utilize diffraction tomography (DT) images that contain information about both imaging models and scattering mechanisms as the input data for the neural network. This approach provides richer a priori knowledge for the neural network and reduces learning difficulty. Numerical simulations of two-dimensional circular scatterers demonstrate that the hybrid M-Net-based electromagnetic inversion algorithm can effectively reconstruct the position, profile, and relative permittivity distribution of scatterers. Comparative experiments reveal significant improvements: the hybrid M-Net achieves an average reconstruction error of <span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>1.17</mn>\u0000 <mo>×</mo>\u0000 <msup>\u0000 <mn>10</mn>\u0000 <mrow>\u0000 <mo>−</mo>\u0000 <mn>4</mn>\u0000 </mrow>\u0000 </msup>\u0000 </mrow>\u0000 <annotation>$$ 1.17times {10}^{-4} $$</annotation>\u0000 </semantics></math>%, outperforming the standard U-Net (<span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>8.39</mn>\u0000 <mo>×</mo>\u0000 <msup>\u0000 <mn>10</mn>\u0000 <mrow>\u0000 <mo>−</mo>\u0000 <mn>4</mn>\u0000 </mrow>\u0000 </msup>\u0000 </mrow>\u0000 <annotation>$$ 8.39times {10}^{-4} $$</annotation>\u0000 </semantics></math>%), standard M-Net (<span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>4.07</mn>\u0000 <mo>×</mo>\u0000 <msup>\u0000 <mn>10</mn>\u0000 <mrow>\u0000 <mo>−</mo>\u0000 <mn>4</mn>\u0000 </mrow>\u0000 </msup>\u0000 </mrow>\u0000 <annotation>$$ 4.07times {10}^{-4} $$</annotation>\u0000 </semantics></math>%), and hybrid U-Net (<span></span><math>\u0000 <semantics>\u0000 <mrow>\u0000 <mn>1.69</mn>\u0000 ","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144264397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Abhay Pratap Singh, Vibhuti Chauhan, R. K. Baghel, Sukeshni Tirkey
{"title":"Enhancing VLSI Design Efficiency With ML-Based C-ANN: Performance Optimization of Gate-Stacked Ferroelectric FE-MOSFETs for High-Speed and RF Applications","authors":"Abhay Pratap Singh, Vibhuti Chauhan, R. K. Baghel, Sukeshni Tirkey","doi":"10.1002/jnm.70064","DOIUrl":"https://doi.org/10.1002/jnm.70064","url":null,"abstract":"<div>\u0000 \u0000 <p>This study presents an innovative approach leveraging TCAD simulations and a Convolutional Artificial Neural Network (C-ANN) to address challenges in VLSI design. A statistical sample of 4000 distinct values was simulated to predict drain current (<i>I</i><sub>ds</sub>), achieving a dramatic reduction in runtime from 46 to 48 days (conventional TCAD) to just 100–120 s using the proposed ML-based C-ANN. The proposed gate-stacking SiO<sub>2</sub> + HfO<sub>2</sub> FE-MOSFET device demonstrates significant advancements, including reductions in short-channel effects (SCEs), subthreshold swing (SS) by 3.12%–4.04%, and drain-induced barrier lowering (DIBL) by 10.19%. Enhanced performance metrics include 52.95% higher I<sub>ON</sub>, 90% reduced gate leakage, and improved transconductance <i>g</i><sub>m</sub>, transconductance generation function (TGF), early voltage (<i>V</i><sub>EA</sub>), and intrinsic gain (<i>A</i><sub>v</sub>) by 26.18%, 27.12%, 29.35%, and 101.24%, respectively. RF parameters such as gate capacitance (<i>C</i><sub>gg</sub>), unity gain frequency (<i>f</i><sub>t</sub>), and gain frequency product (GFP) improved by 34.53%, 48.74%, and 21.18%, making this device ideal for high-speed switching and RF applications, promoting efficiency in low-power VLSI designs.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144264396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bright and Dark Optical Soliton Solutions for a Nonlinear Schrödinger Equation With Kerr Law Nonlinearity and Weak Nonlocality","authors":"Abdul-Majid Wazwaz","doi":"10.1002/jnm.70063","DOIUrl":"https://doi.org/10.1002/jnm.70063","url":null,"abstract":"<div>\u0000 \u0000 <p>In this paper, we investigate a nonlinear Schrödinger equation that includes a combination of Kerr law nonlinearity and weak nonlocality. The model includes linear and nonlinear dispersion and has several applications in nonlinear optics and optical fibers. We retrieve bright, dark, and singular soliton solutions for this system. We implement a variety of powerful schemes to derive this variety of optical soliton solutions. Moreover, we derive more solutions of distinct structures that include periodic and exponential solutions.</p>\u0000 </div>","PeriodicalId":50300,"journal":{"name":"International Journal of Numerical Modelling-Electronic Networks Devices and Fields","volume":"38 3","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144264398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}