Esmaeil Mohammadian Koruyeh, Khaled N. Khasawneh, Chengyu Song, Nael Abu-Ghazaleh
{"title":"Spectre Returns! Speculation Attacks Using the Return Stack Buffer","authors":"Esmaeil Mohammadian Koruyeh, Khaled N. Khasawneh, Chengyu Song, Nael Abu-Ghazaleh","doi":"10.1109/mdat.2024.3352537","DOIUrl":"https://doi.org/10.1109/mdat.2024.3352537","url":null,"abstract":"This article describes a new Spectre-class attack that exploits the return stack buffer and does not rely on the branch predictor unit.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139951022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Y. Narayana, Sumit K. Mandal, R. Ayoub, Mohammad M. Islam, M. Kishinevsky, U. Ogras
{"title":"Fast Analysis Using Finite Queuing Model for Multilayer NoCs","authors":"S. Y. Narayana, Sumit K. Mandal, R. Ayoub, Mohammad M. Islam, M. Kishinevsky, U. Ogras","doi":"10.1109/MDAT.2023.3310167","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3310167","url":null,"abstract":"Editor’s notes: This article introduces a performance analysis technique that accounts for interlayer dependencies in multilayer Networks-on-Chip (NoCs). This technique is based on estimating queuing delays and blocking probabilities between layers. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81796761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture","authors":"Junhuan Yang, Lei Yang","doi":"10.1109/MDAT.2023.3309733","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309733","url":null,"abstract":"Editor’snotes: This article introduces a hardware/software coexploration framework based on neural architecture search, aimed at optimizing the deployment of hyperdimensional computing (HDC) on Network-on-Chip (NoC) architecture. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91016926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mingfeng Lan, Mengquan Li, Jie Xiong, Weichen Liu, Chubo Liu, Kuan-Ching Li
{"title":"Automated Optical Accelerator Search: Expediting Green and Ubiquitous DNN-Powered Intelligence","authors":"Mingfeng Lan, Mengquan Li, Jie Xiong, Weichen Liu, Chubo Liu, Kuan-Ching Li","doi":"10.1109/MDAT.2023.3309895","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309895","url":null,"abstract":"Editor’s notes: In this article, the authors develop a systematized framework to achieve automated optical accelerator architecture search. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78509147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ibrahim Krayem, Joel Ortiz Sosa, C. Killian, D. Chillet
{"title":"Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs","authors":"Ibrahim Krayem, Joel Ortiz Sosa, C. Killian, D. Chillet","doi":"10.1109/MDAT.2023.3309730","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309730","url":null,"abstract":"Editor’s notes: This article presents an analytical model based on queuing theory to evaluate the latency of many-core architecture interconnects, particularly focusing on hybrid interconnections combining electrical and wireless Networks-on-Chip (NoCs). —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80060499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Neethu, K. C. S. Shahana, Rekha K. James, John Jose, Sumit K. Mandal
{"title":"ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training","authors":"K. Neethu, K. C. S. Shahana, Rekha K. James, John Jose, Sumit K. Mandal","doi":"10.1109/MDAT.2023.3309743","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309743","url":null,"abstract":"Editor’s notes: In this article, an architecture for in-memory computing (IMC)-based 2.5-D systems with multiple Network-on-Package (NoP) components is proposed. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79186823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Lingxiao Zhu, Wenjie Fan, Chenyang Dai, Shize Zhou, Yongqi Xue, Zhonghai Lu, Li Li, Yuxiang Fu
{"title":"A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow","authors":"Lingxiao Zhu, Wenjie Fan, Chenyang Dai, Shize Zhou, Yongqi Xue, Zhonghai Lu, Li Li, Yuxiang Fu","doi":"10.1109/MDAT.2023.3310199","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3310199","url":null,"abstract":"Editor’s notes: This article addresses the challenges of excessive storage overhead and the absence of sparsity-aware design in Network-on-Chip (NoC)-based spatial deep neural network accelerators. The authors present a prototype chip that outperforms existing accelerators in both energy and area efficiency, demonstrated on TSMC 28-nm process technology. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76291989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Y. Narayana, Emily J. Shriver, Kenneth O'Neal, Nur Yildirim, Khamida Begaliyeva, U. Ogras
{"title":"Similarity-Based Fast Analysis of Data Center Networks","authors":"S. Y. Narayana, Emily J. Shriver, Kenneth O'Neal, Nur Yildirim, Khamida Begaliyeva, U. Ogras","doi":"10.1109/MDAT.2023.3310450","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3310450","url":null,"abstract":"Editor’s notes: The authors in this article present a novel similarity-based technique that clusters similar flows, achieving high speedups without compromising accuracy. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86912340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"edAttack: Hardware Trojan Attack on On-Chip Packet Compression","authors":"Atul Kumar, Dipika Deb, Shirshendu Das, P. Das","doi":"10.1109/MDAT.2023.3306718","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3306718","url":null,"abstract":"Editor’s notes: In this article, the authors investigate the prospect of a new hardware trojan (HT) in Network-on-Chip (NoC) routers or network interfaces (NIs), targeting on-chip packet compression techniques. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80424157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"PiN: Processing in Network-on-Chip","authors":"Zhonghai Lu","doi":"10.1109/MDAT.2023.3307943","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3307943","url":null,"abstract":"Editor’s notes: The author in this article advocates for Processing in NoC (PiN) as a means to actively engage a Network-on-Chip (NoC) in computation. The article highlights the benefits of utilizing the communication network for system-level performance enhancement, with a case study demonstrating its advantages over conventional passive NoC approaches. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81288795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}