发布求助
文献互助 智能选刊 最新文献

IEEE Design & Test最新文献

筛选
英文 中文
On Hardware-Aware Design and Optimization of Edge Intelligence 基于硬件感知的边缘智能设计与优化
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-12-01 DOI: 10.1109/MDAT.2023.3307558
Shuo Huai, Hao Kong, Xiangzhong Luo, Di Liu, Ravi Subramaniam, C. Makaya, Qian Lin, Weichen Liu
{"title":"On Hardware-Aware Design and Optimization of Edge Intelligence","authors":"Shuo Huai, Hao Kong, Xiangzhong Luo, Di Liu, Ravi Subramaniam, C. Makaya, Qian Lin, Weichen Liu","doi":"10.1109/MDAT.2023.3307558","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3307558","url":null,"abstract":"Editor’s notes: In this article, the authors explore recent efforts in hardware-aware design and optimization for edge intelligence. The article focuses on techniques such as model compression and neural architecture search to enhance system efficiency and effectiveness.—Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84571259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System 可变形状计算机系统的动态可重构网络协议
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-12-01 DOI: 10.1109/MDAT.2023.3309891
Shunichi Nagasaki, J. Kadomoto, H. Irie, S. Sakai
{"title":"Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System","authors":"Shunichi Nagasaki, J. Kadomoto, H. Irie, S. Sakai","doi":"10.1109/MDAT.2023.3309891","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309891","url":null,"abstract":"Editor’s notes: This article presents an approach to address challenges in shapechangeable computer systems, offering methods for ad hoc wireless network construction, routing, and dynamic reconfiguration based on nearfield inductive coupling between on-chip coils. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85595530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SPOCK: Reverse Packet Traversal for Deadlock Recovery 反向包遍历以恢复死锁
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-12-01 DOI: 10.1109/MDAT.2023.3309742
Zeyu Chen, Ankur Bindal, Vaidehi Garg, T. Krishna
{"title":"SPOCK: Reverse Packet Traversal for Deadlock Recovery","authors":"Zeyu Chen, Ankur Bindal, Vaidehi Garg, T. Krishna","doi":"10.1109/MDAT.2023.3309742","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3309742","url":null,"abstract":"Editor’s notes: In this article, the authors leverage a probe-based deadlock detection system and propose a deadlock recovery mechanism for interconnection networks. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87836443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs SoCProbe:异构noc基soc的组成后硅验证
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-12-01 DOI: 10.1109/MDAT.2023.3310355
Gabriele Tombesi, Joseph Zuckerman, Paolo Mantovani, Davide Giri, Maico Cassel dos Santos, Tianyu Jia, David Brooks, Gu-Yeon Wei, L. Carloni
{"title":"SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs","authors":"Gabriele Tombesi, Joseph Zuckerman, Paolo Mantovani, Davide Giri, Maico Cassel dos Santos, Tianyu Jia, David Brooks, Gu-Yeon Wei, L. Carloni","doi":"10.1109/MDAT.2023.3310355","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3310355","url":null,"abstract":"Editor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75191583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting 用于能量收集的电压-电阻自适应 MPPT 电路
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-11-28 DOI: 10.1109/mdat.2023.3335173
Zhang Zhang, Annan Wang, Hongtao Ren, Guangjun Xie, Xin Cheng
{"title":"Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting","authors":"Zhang Zhang, Annan Wang, Hongtao Ren, Guangjun Xie, Xin Cheng","doi":"10.1109/mdat.2023.3335173","DOIUrl":"https://doi.org/10.1109/mdat.2023.3335173","url":null,"abstract":"Editor’s notes: Energy-harvesting systems can directly provide power to wearable IoT devices and industrial sensors efficiently. This article presents the design of a voltage–resistance-adaptive (VRA) maximum power point tracking (MPPT) technique for energy-harvesting systems. —Partha Pratim Pande, Washington State University, USA","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140800723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Future of Design for Test and Silicon Lifecycle Management 测试设计与硅生命周期管理的未来
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-11-20 DOI: 10.1109/mdat.2023.3335195
Janusz Rajski, Vivek Chickermane, Jean-François Côté, Stephan Eggersglüß, Nilanjan Mukherjee, Jerzy Tyszer
{"title":"The Future of Design for Test and Silicon Lifecycle Management","authors":"Janusz Rajski, Vivek Chickermane, Jean-François Côté, Stephan Eggersglüß, Nilanjan Mukherjee, Jerzy Tyszer","doi":"10.1109/mdat.2023.3335195","DOIUrl":"https://doi.org/10.1109/mdat.2023.3335195","url":null,"abstract":"Editor’s notes: Safety-critical applications, such as automotive electronics and data centers, demand high reliability. Integrating design-for-test (DFT) across silicon lifecycle addresses challenges for in-system and in-field operations, which are reviewed in this article. — Mehdi B. Tahoori, Karlsruhe Institute of Technology, Germany","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141507574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Design & Test Publication Information IEEE 设计与测试出版物信息
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-10-20 DOI: 10.1109/mdat.2023.3316244
{"title":"IEEE Design & Test Publication Information","authors":"","doi":"10.1109/mdat.2023.3316244","DOIUrl":"https://doi.org/10.1109/mdat.2023.3316244","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142183639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023) 2023片上网络国际研讨会特刊
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-10-20 DOI: 10.1109/mdat.2023.3313970
Mahdi Nikdast, Miquel Moreto, Masoumeh Azin Ebrahimi, Sujay Deb
{"title":"Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)","authors":"Mahdi Nikdast, Miquel Moreto, Masoumeh Azin Ebrahimi, Sujay Deb","doi":"10.1109/mdat.2023.3313970","DOIUrl":"https://doi.org/10.1109/mdat.2023.3313970","url":null,"abstract":"The International Symposium on networks-on-chip (NOCS) serves as the premier interdisciplinary meeting for research on NoC architecture, implementation, analysis, optimization, and verification, encompassing various aspects of NoCs for embedded high-performance computing systems, un-core and system-level NoCs, inter/intrachip, and rack-scale networks. Similar to previous years, this event has been held in conjunction with the Embedded Systems Week (ESWEEK). This year, NOCS was held in Hamburg, Germany, on 21–22 September 2023, marking its return to a fully in-person conference after virtual and hybrid editions during the pandemic.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138514382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The 2023 Networks-on-Chip (NOCS) Symposium 2023片上网络(NOCS)研讨会
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-10-20 DOI: 10.1109/mdat.2023.3316128
Partha Pratim Pande
{"title":"The 2023 Networks-on-Chip (NOCS) Symposium","authors":"Partha Pratim Pande","doi":"10.1109/mdat.2023.3316128","DOIUrl":"https://doi.org/10.1109/mdat.2023.3316128","url":null,"abstract":"<fig orientation=\"portrait\" position=\"float\" xmlns:mml=\"http://www.w3.org/1998/Math/MathML\" xmlns:xlink=\"http://www.w3.org/1999/xlink\"> <graphic orientation=\"portrait\" position=\"float\" xlink:href=\"pande-3316128.tif\"/> </fig>\u0000The highlight of this issue is the journal-first model adopted for the articles accepted in the 17th edition of the Networks-on-Chip (NOCS) Symposium. NOCS is held in conjunction with the Embedded Systems Week (ESWEEK). This year, NOCS was held in Hamburg, Germany, on 21–22 September 2023, marking its return to a fully in-person symposium after virtual and hybrid editions during the pandemic. NOCS is the premier event dedicated to interdisciplinary research on on-chip, package-scale, chip-to-chip, and datacenter rack-scale communication technology as well as architectures, design methods, applications, and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from interdisciplinary research communities and areas, including discrete optimization and algorithms, computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation. We thank the Technical Program Chairs of NOCS 2023, Masoumeh (Azin) Ebrahimi and Sujay Deb, along with the General Chairs Mahdi Nikdast and Miquel Moreto, for the timely delivery of all the accepted NOCS papers to the <italic xmlns:mml=\"http://www.w3.org/1998/Math/MathML\" xmlns:xlink=\"http://www.w3.org/1999/xlink\">IEEE Design&amp;Test</i> submission system for further processing. This special issue consists of 15 papers.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138514367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications 基于区块链的物联网应用的灵活可扩展BLAKE/BLAKE2协处理器
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2023-10-01 DOI: 10.1109/MDAT.2023.3276936
H. Pham, T. Tran, Vu Trung Duong Le, Nakashima Yasuhiko
{"title":"Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications","authors":"H. Pham, T. Tran, Vu Trung Duong Le, Nakashima Yasuhiko","doi":"10.1109/MDAT.2023.3276936","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3276936","url":null,"abstract":"This article proposes a flexible and scalable BLAKE/BLAKE2 coprocessor aiming for high flexibility, high performance, and low power for blockchain-based IoT applications.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42990021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信