IEEE Transactions on Semiconductor Manufacturing最新文献_第5页

An Ontology for Semiconductor Supply Chain Planning 半导体供应链规划本体

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-20 DOI: 10.1109/TSM.2025.3571926

Raphael Herding;Kenneth J. Fordyce;R. John Milne;Lars Mönch

引用次数: 0

Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits 用于硅光子集成电路的全自动晶圆级边缘耦合测量系统

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-19 DOI: 10.1109/TSM.2025.3552349

Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann

{"title":"Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits","authors":"Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann","doi":"10.1109/TSM.2025.3552349","DOIUrl":"https://doi.org/10.1109/TSM.2025.3552349","url":null,"abstract":"In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with <inline-formula> <tex-math>$0.25~mu $ </tex-math></inline-formula>m photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the system’s ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"168-177"},"PeriodicalIF":2.3,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934143","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Surface Reconstruction for Enhancing the Overlay Modeling Optimization Procedure in Photolithography Processes 改进光刻过程中覆盖建模优化程序的表面重建

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-16 DOI: 10.1109/TSM.2025.3570904

Aris Magklaras;Christos Gogos;Panayiotis Alefragis;Alexios Birbas;Sila Guler

{"title":"Surface Reconstruction for Enhancing the Overlay Modeling Optimization Procedure in Photolithography Processes","authors":"Aris Magklaras;Christos Gogos;Panayiotis Alefragis;Alexios Birbas;Sila Guler","doi":"10.1109/TSM.2025.3570904","DOIUrl":"https://doi.org/10.1109/TSM.2025.3570904","url":null,"abstract":"In the photolithography process of integrated circuit (IC) manufacturing, overlay (OL) control is a key factor for successful exposure. Overlay control is achieved by creating models that can estimate the expected overlay error, so that this can be corrected before the wavefront reaches the wafer surface. Such models consist of basis functions, influenced by application-controllable variables such as process settings, tool characteristics, and field-related factors with their corresponding model parameters. The process of tuning the model parameters involves several time-consuming sensor measurements on markers distributed across the wafer surface and significantly impacts the throughput performance of the exposure system. For this reason, a strategic selection of wafer markers is necessary. In this paper, we propose a methodology to improve the overlay modeling process by exploiting Surface Reconstruction (SR). SR is used as an intermediate step, during the parameter estimation process, to generate additional data from a strategically selected set of markers that are spatially uniform and provide maximum information gain. The proposed method reconstructs the wafer surface by incorporating spatially interpolated estimates derived from the physical insights of existing measurements. This augmented data set, comprised of measured and synthetic overlay data, serves as a comprehensive input for the parameters’ tuning process leading to more accurate overlay modeling. The proposed method is evaluated using real-industry data from a semiconductor process of 300mm diameter wafers. The results demonstrate a significant reduction in the overlay residuals in both x and y directions.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"499-509"},"PeriodicalIF":2.3,"publicationDate":"2025-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

CPDD: A Cross-Scenario Photovoltaic Defect Detector Based on Fine-Grained Feature Autoencoding and Pseudo-Box Contrastive Learning CPDD：基于细粒度特征自动编码和伪盒对比学习的跨场景光伏缺陷检测方法

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-15 DOI: 10.1109/TSM.2025.3570323

Zhaoyang Wang;Haiyong Chen;Zhen Cao

{"title":"CPDD: A Cross-Scenario Photovoltaic Defect Detector Based on Fine-Grained Feature Autoencoding and Pseudo-Box Contrastive Learning","authors":"Zhaoyang Wang;Haiyong Chen;Zhen Cao","doi":"10.1109/TSM.2025.3570323","DOIUrl":"https://doi.org/10.1109/TSM.2025.3570323","url":null,"abstract":"The vision foundation model, relying on large-scale pre-training, has advanced image comprehension capabilities and excels in general scenarios. However, its performance remains suboptimal in specialized tasks, such as photovoltaic (PV) cells defect detection. This limitation stems from the models’ lack of domain-specific prior knowledge. To address this, we propose a two-stage pre-training framework comprising fine-grained feature autoencoding (FFA) and pseudo-box contrastive learning (PCL), which leverages extensive unlabeled raw images to inject domain expertise into the model. First, we investigate the fine-grained feature autoencoder, which trains a detail-sensitive vision transformer (ViT) backbone by reconstructing the histogram of oriented gradients (HOG) of masked images. Second, we pre-train the detection head through contrastive learning. Using selective search (SS) to generate pseudo-boxes, we treat paired boxes from two augmented views of an image as positive samples. The abundant unsupervised pseudo-boxes optimize the detection head’s local representation and localization capabilities. Finally, we fully fine-tune the model with labeled images. Based on this methodology, we build the cross-scenario photovoltaic defect detector (CPDD). The experimental results demonstrate that CPDD achieves state-of-the-art (SOTA) mAP50 scores on three benchmarks, outperforming detectors pre-trained on the COCO dataset as well as those specifically designed for PV defect detection.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"612-623"},"PeriodicalIF":2.3,"publicationDate":"2025-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optimal Design of Wet Etching Bath for 3-D Flash Memories Using Multi-Objective Bayesian Optimization 基于多目标贝叶斯优化的三维闪存湿蚀刻槽优化设计

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-12 DOI: 10.1109/TSM.2025.3569278

Miyuki Kouda;Yumi Mori;Tomohiko Sugita;Youyang Ng

{"title":"Optimal Design of Wet Etching Bath for 3-D Flash Memories Using Multi-Objective Bayesian Optimization","authors":"Miyuki Kouda;Yumi Mori;Tomohiko Sugita;Youyang Ng","doi":"10.1109/TSM.2025.3569278","DOIUrl":"https://doi.org/10.1109/TSM.2025.3569278","url":null,"abstract":"Recently, the complexity of semiconductor manufacturing processes has increased, resulting in a growing need for high-precision optimization of device structures. For example, in batch-type wet etching devices, the flow of chemical liquids in the process bath can vary depending on the device structure, which causes variations in the etching state of the wafer. This issue is addressed using a feedback mechanism that adjusts the device structure iteratively based on the results of an etching experiment, thereby achieving more uniform etching conditions. However, this approach requires a large number of trial experiments. In the fabrication process of 3D flash memory devices, the formation of word lines in the silicon substrate requires precise control of the silicon concentration in the etching solution. However, this concentration can fluctuate due to the dissolution of the SiN film during the etching process, which can cause various problems. Thus, this study proposes an innovative multi-objective Bayesian optimization method that is informed by image and physical quantity data from fluid dynamics simulations to derive optimal wet etching bath design parameters. The proposed method was validated through simulation experiments, and the simulation results were used to identify the best possible wet etching bath designs.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"439-445"},"PeriodicalIF":2.3,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Generative AI-Driven Data Augmentation for Robust Virtual Metrology: GANs, VAEs, and Diffusion Models 生成人工智能驱动的数据增强鲁棒虚拟计量：gan， VAEs和扩散模型

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-12 DOI: 10.1109/TSM.2025.3569229

Chin-Yi Lin;Tzu-Liang Tseng;Solayman Hossain Emon;Tsung-Han Tsai

{"title":"Generative AI-Driven Data Augmentation for Robust Virtual Metrology: GANs, VAEs, and Diffusion Models","authors":"Chin-Yi Lin;Tzu-Liang Tseng;Solayman Hossain Emon;Tsung-Han Tsai","doi":"10.1109/TSM.2025.3569229","DOIUrl":"https://doi.org/10.1109/TSM.2025.3569229","url":null,"abstract":"Advanced semiconductor manufacturing increasingly depends on Virtual Metrology (VM) for real-time quality monitoring, yet conventional data-driven models rarely capture the scarce or extreme process conditions critical for robust predictions. We propose a Multi-Stage Constrained Data Generative Augmentation (MSC-DGA) framework that integrates Variational Autoencoders (VAE), Normalizing Flows, and Constrained Diffusion to systematically expand coverage of seldom-seen regimes. By embedding strict engineering constraints during generation and applying a two-stage quality filter, MSC-DGA ensures physically plausible synthetic samples. We further present theoretical proofs showing that multi-stage generation can approximate complex sensor distributions while enforcing domain validity, thereby improving coverage and preserving essential process physics. Empirically, we demonstrate the approach on real WBG SiC data, incorporating these curated samples into a Generative Foundation Model (GFA-VM) with few-shot fine-tuning and uncertainty-based active sampling, yielding significant accuracy gains for rarely observed conditions. Experiments confirm notable performance improvements over single-stage augmentation and naive oversampling. By rigorously balancing distribution realism with engineering feasibility, MSC-DGA offers a practical and theoretically grounded advancement for VM, enhancing adaptive control and product quality in next-generation power semiconductor manufacturing.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"642-658"},"PeriodicalIF":2.3,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11002548","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Manufacturing of g-C3N4-ZnS-Doped TiO2 Nanofibers by Electrospinning and Their Application to Dye-Sensitized Solar Cell as an Additional Layer in Photoanode 静电纺丝制备g- c3n4 - zns掺杂TiO2纳米纤维及其在染料敏化太阳能电池中的应用

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-12 DOI: 10.1109/TSM.2025.3550570

Yu-Hsun Nien;Jhih-Wei Zeng;Yu-Han Huang;Jung-Chuan Chou;Chih-Hsien Lai;Po-Yu Kuo;Po-Hui Yang;Yu-Wei Chen;Wen-Hao Chen

{"title":"Manufacturing of g-C3N4-ZnS-Doped TiO2 Nanofibers by Electrospinning and Their Application to Dye-Sensitized Solar Cell as an Additional Layer in Photoanode","authors":"Yu-Hsun Nien;Jhih-Wei Zeng;Yu-Han Huang;Jung-Chuan Chou;Chih-Hsien Lai;Po-Yu Kuo;Po-Hui Yang;Yu-Wei Chen;Wen-Hao Chen","doi":"10.1109/TSM.2025.3550570","DOIUrl":"https://doi.org/10.1109/TSM.2025.3550570","url":null,"abstract":"This study aims to enhance photovoltaic performance of dye-sensitized solar cells (DSSCs) by modification of photoanode with nanofibers (NFs) as an additional layer. g-C3N4 and ZnS (CN-ZnS) were selected for the modification of TiO2 nanofibers. The g-C3N4 was synthesized using a calcination method, while the CN-ZnS was successfully prepared through a simple hydrothermal method. Subsequently, CN-ZnS/TiO2 NFs with different mixing ratios were fabricated using electrospinning technology. The synthesized material was characterized by X-ray diffraction and scanning electron microscopy. The positive impact of incorporating the additional layer on the photovoltaic performance of DSSCs was confirmed through electrochemical impedance spectroscopy, UV-vis spectroscopy, J-V characterization, and incident photon-to-current efficiency measurements. Notably, the DSSC modified with 1% CN-ZnS/TiO2 NFs achieves an efficiency of 5.44%, and it reaches an efficiency of 7.04% under low illumination (30 mW/cm2). These results suggest that CN-ZnS/TiO2 NFs are promising for enhancing the performance of DSSCs.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"332-342"},"PeriodicalIF":2.3,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Integration Challenges on 300-mm High Resistivity Silicon Substrates 300毫米高电阻硅衬底的集成挑战

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-05 DOI: 10.1109/TSM.2025.3567206

A. Abbadie;A. Desse;K. Melhem;S. Dario Mariani;D. Fagiani;P. Zuliani;F. Faller

引用次数: 0

Vacancy-Type Defects in HfO2 Layers and Their Role in Amorphous-to-Crystalline Transition Studied by Monoenergetic Positron Beams 单能正电子束研究HfO2层中空位型缺陷及其在非晶向晶转变中的作用

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-05 DOI: 10.1109/TSM.2025.3548450

Akira Uedono;Kazuya Kawakami;Tatsunori Kuribara;Ryu Hasunuma;Yosuke Harashima;Yasuteru Shigeta;Zeyuan Ni;Ruolin Yan;Hideo Nakamura;Akira Notake;Tsuyoshi Moriya;Koji Michishio;Shoji Ishibashi

引用次数: 0

Capacity Estimation for Semiconductor Wafer Fabrication Facilities via an Optimization Model Based on Flexible Lead Times 基于柔性交货期优化模型的半导体晶圆制造设备产能评估

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-03 DOI: 10.1109/TSM.2025.3547026

Sungwon Hong;Younsoo Lee;Kyungsik Lee

引用次数: 0