2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)最新文献_第6页

Exploration of Stepped Recessed Gate Silicon- On-Nothing MOSFET for Enhancing Self Heating Effect 阶梯式凹槽栅无导硅MOSFET的探索

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179945

S. Mishra, S. Mohanty

引用次数: 0

A CAD Approach for Accurate Decap Estimation and Allocation for Supply Noise Reduction in SoC SoC电源降噪中精确Decap估计与分配的CAD方法

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179944

P. Mitra, P. Alok, A. Sarkar

引用次数: 0

FPGA-Based Digital Down Converter for GSM Application 基于fpga的GSM数字下变频

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179939

Debarshi Datta, P. Mitra, H. Dutta

引用次数: 1

Development of 14nm Tri-layered (s-Si/s-SiGe/s-Si) Channel DG- NanoFET 14nm三层(s-Si/s-SiGe/s-Si)通道DG- NanoFET的研制

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179906

Kuleen Kumar, Rudra Sankar Dhar

引用次数: 1

Comparative Study Between Silica Gel- Aluminium & Crystalline Silica – Aluminium Composites Developed through P/M Route 粉末冶金法制备硅胶铝与结晶硅铝复合材料的比较研究

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179901

S. Debnath, A. K. Pramanick

引用次数: 0

Performance Analysis of Hybrid Electro-Optic Architecture for Next Generation Network 下一代网络混合电光架构性能分析

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179895

Ananda Roy, Shreyoshi Chakraborty, Sourish Chatterjee, Sudipta Samui, C. Pani

{"title":"Performance Analysis of Hybrid Electro-Optic Architecture for Next Generation Network","authors":"Ananda Roy, Shreyoshi Chakraborty, Sourish Chatterjee, Sudipta Samui, C. Pani","doi":"10.1109/VLSIDCS47293.2020.9179895","DOIUrl":"https://doi.org/10.1109/VLSIDCS47293.2020.9179895","url":null,"abstract":"In this paper our objective is to develop a hybrid electro-optic network model that can provide a significant impact for the next generation networks. Optical network provides very high bandwidth and minimum loss. But the optical switch suffers high latency (10 ms) at the time of switch reconfiguration and hence not suitable to handle bursty traffic efficiently. In our proposed model the traffics are classified into two categories: mouse traffic and elephant traffic. As per the traffic category the network path is selected. For mouse traffic electrical domain is used and for elephant traffic optical path is used. The detailed network architecture and its functions are elaborately described in this paper. The performance of the network is analyzed in NS2 environment and is focused on physical layer parameters in terms of cumulative network delay, consumed bandwidth and packet loss. A comparative analysis is done for the existing network model and our proposed model. Simulation results indicate that our proposed model has a considerable impact for future realistic network.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129163105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design and Analysis of Double Gate Tunnel Field Effect Transistor using Charged Plasma 带电等离子体双栅隧道场效应晶体管的设计与分析

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179948

Hemanga Banerjee, K. Sarkar, Papiya Debnath, Swarnil Roy, M. Chanda

引用次数: 0

Design and Implementation on EMBA Authentication models EMBA认证模型的设计与实现

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179890

Indrajit Das, Shalini Singh, Ria Das, S. Biswas, Sanjoy Roy, Sonali Gupta

{"title":"Design and Implementation on EMBA Authentication models","authors":"Indrajit Das, Shalini Singh, Ria Das, S. Biswas, Sanjoy Roy, Sonali Gupta","doi":"10.1109/VLSIDCS47293.2020.9179890","DOIUrl":"https://doi.org/10.1109/VLSIDCS47293.2020.9179890","url":null,"abstract":"Authentication systems in general have faced long-term security deficit despite convoluted sophistication within various systems for decades. Unfortunately, humans serve as the weakest prey for exploitation within any security chain. Unskillful and inefficient communications between systems and humans give rise to multiple vulnerabilities related to any security model. Additionally, the Passwords/Personal Identification Numbers (PIN’s) fail to provide idealistic security due to the lack of flawlessness in traditional password systems. On the contrary, since eye movements serve as a natural interaction modality, it was observed that the amalgamation of eye-tracking models enhances the overall security. In this context, the work presented in this paper leads to an extensive study and survey of many research works pertaining to existing Eye Movement authentication models. Besides, high-level overview of many conventional authentication methodologies have been discussed that can be launched in such EMBA models. Additionally, comparative analysis and performance metrics of different EMBA system is discussed. It was observed that the eye-password method has highest accuracy (97%) and eye motion based techniques has lowest accuracy (60%). Finally, an eye pupil tracking based authentication model has been proposed with accuracy of Eye detection, Eye open or closed detection and Eye pupil tracking detection are 98%, 92.51% and 96.25% respectively.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121318080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Design of Low Phase-Noise LC- VCO at 2.5GHz by Body-Bias Technique Using CMOS 180 nm Technology 基于CMOS 180纳米技术的体偏技术设计2.5GHz低相位噪声LC- VCO

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179857

Shrabanti Das, Swarup Dandapat, S. Chatterjee

引用次数: 0

Chaotic Advection Using Universal Motor Drive 使用通用电机驱动的混沌平流

2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) Pub Date : 2020-07-01 DOI: 10.1109/VLSIDCS47293.2020.9179917

A. Maity, A. Pal, A. Saha, Bagish Kundu, P. Mukherjee, Rupak Bhattacharyya, S. Dutta, S. Adhikary

引用次数: 0