Hemanga Banerjee, K. Sarkar, Papiya Debnath, Swarnil Roy, M. Chanda
{"title":"带电等离子体双栅隧道场效应晶体管的设计与分析","authors":"Hemanga Banerjee, K. Sarkar, Papiya Debnath, Swarnil Roy, M. Chanda","doi":"10.1109/VLSIDCS47293.2020.9179948","DOIUrl":null,"url":null,"abstract":"In this paper, we propose, illustrate and validate a design for a double-gate tunnel field effect transistor (TFET) in which dual-material gate has been incorporated, i.e., The semiconductor is un-doped and the source and drain regions are induced by the concept of charged plasma. The simulations for the device show significant improvement from single gate devices that may or may not use dual-material gates. Double Gate TFET has been designed using acceptable parameters, thus providing an on-current (ION) of 0.018 × 10−5 A and an off-current (IOFF) of the order of 10−17.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Analysis of Double Gate Tunnel Field Effect Transistor using Charged Plasma\",\"authors\":\"Hemanga Banerjee, K. Sarkar, Papiya Debnath, Swarnil Roy, M. Chanda\",\"doi\":\"10.1109/VLSIDCS47293.2020.9179948\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose, illustrate and validate a design for a double-gate tunnel field effect transistor (TFET) in which dual-material gate has been incorporated, i.e., The semiconductor is un-doped and the source and drain regions are induced by the concept of charged plasma. The simulations for the device show significant improvement from single gate devices that may or may not use dual-material gates. Double Gate TFET has been designed using acceptable parameters, thus providing an on-current (ION) of 0.018 × 10−5 A and an off-current (IOFF) of the order of 10−17.\",\"PeriodicalId\":446218,\"journal\":{\"name\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIDCS47293.2020.9179948\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS47293.2020.9179948","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Analysis of Double Gate Tunnel Field Effect Transistor using Charged Plasma
In this paper, we propose, illustrate and validate a design for a double-gate tunnel field effect transistor (TFET) in which dual-material gate has been incorporated, i.e., The semiconductor is un-doped and the source and drain regions are induced by the concept of charged plasma. The simulations for the device show significant improvement from single gate devices that may or may not use dual-material gates. Double Gate TFET has been designed using acceptable parameters, thus providing an on-current (ION) of 0.018 × 10−5 A and an off-current (IOFF) of the order of 10−17.