{"title":"Atmospheric pressure CVD-grown SiGe base HBT with the highest value of current gain-Early voltage product","authors":"T. Han, D. Cho, S.-M. Lee, B.R. Ryum","doi":"10.1109/TENCON.1995.496426","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496426","url":null,"abstract":"A low thermal-budget SiGe base heterojunction bipolar transistor (HBT) with a record current gain-Early voltage product (/spl beta//spl middot/Va) has been fabricated using atmospheric pressure (AP) CVD. After growing the SiGe layer on the wafer patterned by local oxidation of silicon (LOCOS), the HBT received thermal annealing only one time for drive-in and activation of arsenic (As) dopant in the polysilicon-emitter. For the 1/spl times/4 /spl mu/m/sup 2/ emitter, typical value of /spl beta//spl middot/Va is 200,000 V (/spl beta/=2,000 and Va=100 V) at the collector current of 0.9 mA.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126084036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Diffused-quantum-well vertical cavity Fabry-Perot reflection modulator","authors":"W. Choy, S.F. Ip, E. Li","doi":"10.1109/TENCON.1995.496343","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496343","url":null,"abstract":"This is a first report to use diffused quantum well (DFQW) as the active cavity of the Fabry-Perot reflection modulator. Apart from the simple fabrication process of the DFQW, this material system provides a wavelength tuning range and improves the modulation properties of the device which thus is competitive with the same kind of modulator.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126284989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Onoye, T. Masaki, Y. Morimoto, Y. Sato, I. Shirakawa
{"title":"HDTV level MPEG2 video decoder VLSI","authors":"T. Onoye, T. Masaki, Y. Morimoto, Y. Sato, I. Shirakawa","doi":"10.1109/TENCON.1995.496442","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496442","url":null,"abstract":"A novel architecture for an HDTV level MPEG2 decoder is developed, which consists of specific functional macrocells and macroblock level pipeline buffers. Owing to the sophisticated I/O interface among macrocells, macroblock level pipeline buffers are successfully incorporated with functional macrocells. A new organization of frame memory and interface is also devised. The designed decoder contains 454 K transistors, and occupies 81.0 mm/sup 2/ with a 0.6 /spl mu/m triple-metal CMOS technology.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127246091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An implementation of branch target buffer for high performance applications","authors":"S. Sonh, Hoonmo Yang, M. Lee","doi":"10.1109/TENCON.1995.496448","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496448","url":null,"abstract":"Efficient executions of branch instructions are one of the most important issues in implementing high performance microprocessors. Branching instructions are above 20% of total instruction in most programs. BTB (Branch Target Buffer) enhances the speed of branch instruction execution by predicting the branch path, including currently executed branch instruction address, prediction information, and target address. The BTB is designed as a 4-way set associative organization with 256 branch entries. Pseudo-LRU algorithm is used for replacement of lines instead of ordinary LRU algorithm. Also IP(Instruction Pointer) chain is designed for verifying the BTB.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124282378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Nitridation of sputtered silicon dioxide films","authors":"E. Jelenkovic, K. Tong","doi":"10.1109/TENCON.1995.496392","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496392","url":null,"abstract":"It is shown that nitridation of sputtered oxide by reactive sputtering can give a hardened oxide-silicon interface with reduced interface states generation after stress. SIMS analysis has confirmed the existence of SiN peak close to the oxide/silicon interface. A stacked SiO/sub 2//SiO/sub x/N/sub y/ structure is discussed relative to charge trapping, leakage current and mid-gap voltage shift.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"19 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123361631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Two-dimensional simulation of kink-related backgating effect in GaAs MESFETs","authors":"K. Horio, K. Usami","doi":"10.1109/TENCON.1995.496350","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496350","url":null,"abstract":"2-D simulation of backgating effect in GaAs MESFETs is made in which impact ionization of carriers and deep donors \"EL2\" in the substrate are considered. The kink-related backgating is reproduced, which is qualitatively consistent with recent experiments. The mechanism is attributed to the change of EL2's nature by capturing holes which are generated by impact ionization and flow into the substrate.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129864135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An energy balance equation based 0.1 /spl mu/m MOSFET model including velocity overshoot behavior","authors":"J. Sim","doi":"10.1109/TENCON.1995.496376","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496376","url":null,"abstract":"In order to evaluate the velocity overshoot phenomenon in the deep submicron MOS devices, the energy balance equation should be incorporated with the drift-diffusion equation that includes thermoelectric diffusion. This paper presents an analytical current model for deep submicron MOS devices by solving the energy balance equation. Our model results show good agreement with experimental results. We have successfully derived the drain current model composed of drift and thermoelectric currents.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116356968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Technology of infrared rapid thermal annealing and its application in VLSI","authors":"Hui Lin, Rong Liu, Bingsen Chen, Hongfa Luan","doi":"10.1109/TENCON.1995.496395","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496395","url":null,"abstract":"The technology and equipment of the infrared rapid thermal annealing for VLSI is reported. The equipment used for rapid thermal annealing has been made with an radio frequency (RF)-induced graphite heater in a quartz housing as an infrared heating source. By using this technology and equipment the fabrication of shallow junction, the formation of silicide, the effect of BPSG reflow and annihilating the micro defects and thermal donor in CZ Si single crystal are discussed.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129217249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimized CMOS infrared detector microsystems","authors":"N. Schneeberger, S. Deteindre, O. Paul, H. Baltes","doi":"10.1109/TENCON.1995.496372","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496372","url":null,"abstract":"We fabricated and characterized four different CMOS thermoelectric infrared radiation sensor microsystems. The performance of these systems was modelled with the finite element simulation package SOLIDIS, based on measured materials properties. The agreement with experiment was better than 7.5%. Based on this validation we optimized the design parameters of such microsystems.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133652919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Park, Jin Lee, H. Chung, W. Jeong, Jae-cheol Cho, Y. Jeong, Y. Yoo
{"title":"Photovoltaic characteristics of CuInS/sub 2//CdS heterojunction","authors":"G. Park, Jin Lee, H. Chung, W. Jeong, Jae-cheol Cho, Y. Jeong, Y. Yoo","doi":"10.1109/TENCON.1995.496346","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496346","url":null,"abstract":"CuInS/sub 2//CdS heterojunction has been fabricated by depositing CdS thin film with dopant In on ternary compound CuInS/sub 2/ thin film. Its best conversion efficiency was 5.66% under the illumination of 100 mW/cm/sup 2/, and its series resistance and lattice mismatch was 5.1 /spl Omega/ and 3.2% respectively. Besides, 4-layer structure heterojunction of low /spl rho/-CuInS/sub 2//high /spl rho/-CuInS/sub 2//high /spl rho/-CdS/low /spl rho/-CdS has been fabricated. Its bast conversion efficiency was 8.25% under the illumination of 100 mW/cm/sup 2/, and its series resistance and lattice mismatch was 4.3 /spl Omega/ and 2.8% respectively.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134221219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}