2015 IEEE 21st International On-Line Testing Symposium (IOLTS)最新文献_第4页

Mitigation of fail-stop failures in integer matrix products via numerical packing 整数矩阵乘积的数值包装失效缓解

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229840

Ijeoma Anarado, Y. Andreopoulos

{"title":"Mitigation of fail-stop failures in integer matrix products via numerical packing","authors":"Ijeoma Anarado, Y. Andreopoulos","doi":"10.1109/IOLTS.2015.7229840","DOIUrl":"https://doi.org/10.1109/IOLTS.2015.7229840","url":null,"abstract":"The decreasing mean-time-to-failure estimates of distributed computing systems indicate that high-performance generic matrix multiply (GEMM) routines running on such environments may need to mitigate an increasing number of fail-stop failures. We propose a new roll-forward solution to this problem that is based on the production of redundant results within the numerical representation of the outputs via the use of numerical packing. This differs from all existing roll-forward solutions that require a separate set of checksum (or duplicate) results. In particular, unlike all existing approaches, the proposed approach does not require additional hardware resources for failure mitigation. Instead, in our proposal the required duplication is inserted in the input matrices themselves. The accommodation of the duplicated inputs imposes 30.6% or 37.5% reduction in the maximum output bitwidth supported in comparison to integer matrix products performed on 32-bit floating-point or integer representations, respectively. Nevertheless, this bitwidth reduction is comparable to the one imposed due to the checksum elements of traditional roll-forward methods, especially for cases where multiple core failures must be mitigated. Experiments performed on an Amazon EC2 instance with 6 Intel Haswell cores dedicated to GEMM computations show that, in comparison to the state-of-the-art failure-intolerant integer GEMM realization, the proposed approach incurs only 5-19.4% drop in the achievable peak performance. This overhead is significantly lower than the 33.3 - 37% overhead incurred by the equivalent checksum-based method.","PeriodicalId":413023,"journal":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128297566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Power analysis attacks on ARX: An application to Salsa20 对ARX的功率分析攻击:Salsa20的应用

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229828

Bodhisatwa Mazumdar, Subidh Ali, O. Sinanoglu

{"title":"Power analysis attacks on ARX: An application to Salsa20","authors":"Bodhisatwa Mazumdar, Subidh Ali, O. Sinanoglu","doi":"10.1109/IOLTS.2015.7229828","DOIUrl":"https://doi.org/10.1109/IOLTS.2015.7229828","url":null,"abstract":"In this paper, we analyze the vulnerability of Salsa20 stream cipher against power analysis attacks, especially against correlation power analysis (CPA), which is the strongest form of power analysis attacks. In recent literature, a rigorous study of optimal differential characteristics is presented, but an analysis of the resistance of the cipher against power analysis side-channel attacks remains absent. Our technique targets the three subrounds of the first round of Salsa20. The overall correlation based differential power analysis (DPA) has an attack complexity of 219. From extensive experiments on a reduced area implementation of Salsa20, we demonstrate that two key words k0, k7 of a block in Salsa20 are extremely vulnerable to CPA while a combination of two key words k2, k4 produced a very low success rate of 0.2, which shows a high resilience against correlation-analysis DPA. This varying resilience of the key words towards correlation-analysis DPA has not been observed in any stream or block cipher in present literature, which makes the architecture of this stream cipher interesting from the side-channel analysis perspective.","PeriodicalId":413023,"journal":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125195818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Low-power memory repair for high defect densities 低功耗存储器修复高缺陷密度

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229853

P. Papavramidou, M. Nicolaidis

引用次数: 4

Self-awareness and self-learning for resiliency in real-time systems 实时系统弹性的自我意识和自我学习

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229845

M. Tahoori, A. Chatterjee, K. Chakrabarty, Abhishek Koneru, Arunkumar Vijayan, D. Banerjee

{"title":"Self-awareness and self-learning for resiliency in real-time systems","authors":"M. Tahoori, A. Chatterjee, K. Chakrabarty, Abhishek Koneru, Arunkumar Vijayan, D. Banerjee","doi":"10.1109/IOLTS.2015.7229845","DOIUrl":"https://doi.org/10.1109/IOLTS.2015.7229845","url":null,"abstract":"While the notion of self-awareness has a long history in biology, psychology, medicine, engineering and (more recently) computing, we are seeing the emerging need for self-awareness in the context of complex Systems-on-Chip that must address the often conflicting requirements of performance, resiliency, energy, cost, etc. in the face of highly dynamic operational behaviors coupled with process, environment, and workload variabilities. Unlike traditional Systems-on-Chip (SoCs), self-aware SoCs must deploy an intelligent co-design of the control, communication, and computing infrastructure that interacts with the physical environment in real-time in order to modify the systems behavior so as to adaptively achieve desired objectives and Quality-of-Service (QoS). Self-aware SoCs require a combination of ubiquitous sensing and actuation, health-monitoring, and self-learning to enable the SoCs adaptation over time and space. This special session targets self-learning and self-awareness in two domains. The first one is a self-learning runtime reliability prediction approach by reusing Design-for-Test (DfT) infrastructure. The other one discusses real-time systems and applications to wireless communication, signal processing and control.","PeriodicalId":413023,"journal":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128052405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Filtering-based error-tolerability evaluation of image processing circuits 基于滤波的图像处理电路容错性评价

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229846

Tong-Yu Hsieh, Yi-Han Peng

{"title":"Filtering-based error-tolerability evaluation of image processing circuits","authors":"Tong-Yu Hsieh, Yi-Han Peng","doi":"10.1109/IOLTS.2015.7229846","DOIUrl":"https://doi.org/10.1109/IOLTS.2015.7229846","url":null,"abstract":"For some systems errors can be regarded as being acceptable as long as their significance is low enough. Image processing circuits are one such example due to human being's insensitivity to minor errors in colors. Significant errors usually destroy the structure of an image, and thus appear to be perceptible. This also makes larger changes to the frequency feature of the image. By examining the degree at which the frequency is varied, the acceptability of errors can be determined. In this work we propose a filtering-based test method that can quantify the frequency variance incurred by errors. According to the obtained variance value, the acceptability of an image can be determined by comparing the value with user-specified thresholds. The experimental results on a large number of erroneous benchmark images show that the proposed method can accurately differentiate unacceptable images from acceptable ones. The implementation of the proposed method is simple, and thus can facilitate implementation of a BIST (Built-In Self-Test) circuitry for efficient product grading, as well as in-field reliability determination and enhancement. This is useful when the target circuit is employed in some critical applications such as automotive or medical electronic systems.","PeriodicalId":413023,"journal":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128626182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Concurrent error detection in nonlinear digital filters using checksum linearization and residue prediction 基于校验和线性化和残差预测的非线性数字滤波器并发误差检测

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229832

Suvadeep Banerjee, Md Imran Momtaz, A. Chatterjee

引用次数: 6

BTI and leakage aware dynamic voltage scaling for reliable low power cache memories 可靠的低功耗高速缓存存储器的BTI和泄漏感知动态电压缩放

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229858

Daniele Rossi, V. Tenentes, S. Khursheed, B. Al-Hashimi

引用次数: 16

An Hybrid Architecture for consolidating mixed criticality applications on multicore systems 用于在多核系统上整合混合关键应用程序的混合体系结构

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229823

Serhiy Avramenko, Stefano Esposito, M. Violante, M. Sozzi, M. Traversone, Marco Binello, Marco Terrone

引用次数: 16

Identifying aging-aware representative paths in processors 识别处理器中具有老化意识的代表性路径

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229825

C. Sandionigi, O. Héron

引用次数: 3

Low leakage radiation tolerant CAM/TCAM cell 低泄漏耐辐射CAM/TCAM电池

2015 IEEE 21st International On-Line Testing Symposium (IOLTS) Pub Date : 2015-07-06 DOI: 10.1109/IOLTS.2015.7229860

Nikolaos Eftaxiopoulos-Sarris, N. Axelos, K. Pekmestzi

引用次数: 9