Serhiy Avramenko, Stefano Esposito, M. Violante, M. Sozzi, M. Traversone, Marco Binello, Marco Terrone
{"title":"An Hybrid Architecture for consolidating mixed criticality applications on multicore systems","authors":"Serhiy Avramenko, Stefano Esposito, M. Violante, M. Sozzi, M. Traversone, Marco Binello, Marco Terrone","doi":"10.1109/IOLTS.2015.7229823","DOIUrl":null,"url":null,"abstract":"The paper proposes a novel hybrid architecture to consolidate avionic applications with different levels of criticality in a multicore processor. The architecture stems from the need of deploying into one computer different applications with conflicting requirements in terms of criticalities that today are mapped into multiple independent computers. The architecture relies on a type-1 hypervisor to separate the applications exposing different criticalities levels, to avoid that low-criticality applications might corrupt high-criticality applications. Moreover, the architecture exploits custom-designed hardware watchdogs to enforce error detection. Fault-injection results are presented to illustrate the robustness of the architecture.","PeriodicalId":413023,"journal":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2015.7229823","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
The paper proposes a novel hybrid architecture to consolidate avionic applications with different levels of criticality in a multicore processor. The architecture stems from the need of deploying into one computer different applications with conflicting requirements in terms of criticalities that today are mapped into multiple independent computers. The architecture relies on a type-1 hypervisor to separate the applications exposing different criticalities levels, to avoid that low-criticality applications might corrupt high-criticality applications. Moreover, the architecture exploits custom-designed hardware watchdogs to enforce error detection. Fault-injection results are presented to illustrate the robustness of the architecture.