Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)最新文献

{"title":"Challenges and trade-offs of SOC vs SIP - Session 5","authors":"Rakesh H. Patel","doi":"10.1109/cicc.2004.1358735","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358735","url":null,"abstract":"The process technology innovation and integration continues, allowing the realization of complex System-onChip (SoC) integrating on the same chip tens of millions of transistors performing different functionality. In addition, to achieving an integrated system, SoC may not always be the most feasible solution, where the cost and complexity will increase, in comparison to System-In-Chip (Sip) solution. This session will also cover a more cost effective embedded memory solution (MRAM); as well as discuss the GSP SoC solution where the digital, analog and RF functionality have been embedded in a single chip.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"52 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124297034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Single chip radio solutions for wireless communication - Session 18","authors":"Oliver Weyther","doi":"10.1109/cicc.2004.1358830","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358830","url":null,"abstract":"The market trend towards wireless communication systems continues. More and more communication devices employ wireless technology, where previously wired technologies were common. Cellular communication systems, wireless local area and personal area networks provide connectivity in the office, to the mobile user, and at home. Modern semiconductor process technology is a key enabling factor for the realization of highly integrated radio systems and low cost solutions, which are needed to meet market and consumer requirements. In this session five papers will be presented, which give examples for how advanced process and design techniques have been applied to achieve this objective. Bluetooth has become a popular technology for short range communication mainly in mobile phones, but also in personal digital assistants. It operates in the 2.4 GHz ISM band. Low power consumption and high level of integration are critical requirements in these applications. The first paper presents a design technique that leads to a Bluetooth RF transceiver, which can operate from a 1V supply voltage. Details are given on every block of the CMOS design and the silicon on insulator (SOI) technology used to achieve low power operation. Wireless sensor networks have drawn the attention of the circuit design community because of their extreme requirements on the power consumption of the associated radio subsystem. In the second paper researchers from the University of California, Berkeley, provide insights in how they achieved a power consumption of less than 1.3 mW by carefully designing their system, the architecture of the 900 MHz radio subsystem itself, and making the right choices in the design of the circuit. The third paper provides a solution on how to address the cost issues in the demanding market for high speed wireless LAN solutions according to IEEE 802.1 1 b/g standard. A reconfigurable radio architecture in this single-chip radio design for 2.4 GHz operation provides loopback paths, which allow the digital signal processing in the baseband processor to measure and correct the imperfections of the radio transceiver subsystem. In this way process tolerances can be compensated for, which increases yield in production and performance of the device in the field. The next paper addresses a different kind of problem in transceiver design namely the challenge of dual band operation, when building an 802.1 1 a/b/g wireless LAN multi-standard solution. The 0.18 pm CMOS solution presented implements a direct conversion transceiver architecture with separate RF frontends to support 2.4 GHz …","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"4 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120859134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Advanced MOSFET modeling - Session 2","authors":"C. McAndrew","doi":"10.1109/cicc.2004.1358716","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358716","url":null,"abstract":"RF and mixed-signal design depends on the availability of accurate and realistic device models. The relentless advance in speed and performance of CMOS technologies has opened up new product areas for CMOS, such as RF, but the most widely used MOSFET models have not kept pace with this advance. This session contains four papers that report developments in areas of MOSFET modeling that are critical for modern technologies and application areas.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115271474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Advanced data converter design techniques","authors":"P. Drennan","doi":"10.1109/cicc.2004.1358703","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358703","url":null,"abstract":"As IC process technologies have progressed, noise-shaping data converters, already known for their superior linearity performance, have steadily overtaken wider bandwidth applications previously dominated by Nyquist-rate data converters. This talk will start with the fundamental concepts of noise-shaping converters and also cover some of the more recent architectural innovations that have led to the dominance of the sigma-delta data converter as the choice for a wide variety of high resolution-bandwidth applications including wireless receivers. A brief case study of a multi-bit sigma-delta ADC design for a receiver application will help to illuminate some of the key considerations involved in noise-shaping data converter circuit design.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121703072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"CMOS scaling and alternatives - Session 11","authors":"L. Wissel","doi":"10.1109/cicc.2004.1358780","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358780","url":null,"abstract":"This session presents a set of papers related both to CMOS scaling and also to the implementation of features to enhance CMOS performance independent of scaling, either in the digital domain or extended to the RF domain. This session begins and ends with Invited papers, and includes between them two papers on the coveted goal of achieving performance gains in an existing technology generation.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121856313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Advanced memory issues - Session 16","authors":"Jean-Christophe Viale","doi":"10.1109/cicc.2004.1358814","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358814","url":null,"abstract":"Advancements in technology often bring an increasing array of challenges in memory design. Requirements for memory continue to drive designs toward higher densities, lower voltage, reduced power, and improved speed, while a high level of reliability must be maintained. This session presents solutions to many of the issues fought today in the development of advanced memories. Invited Paper 16-1, by the well known Dr. Kiyoo Itoh, opens the session with a presentation on the trends and challenges associated with low-voltage embedded RAMS. State-of-the-art low-voltage eDRAMs and eSRAMs are discussed as well as future prospects. Paper 16-2 addresses the challenge in embedded SRAMs of detecting cells with poor signal margin by introducing a test mode that allows variable sense-amp timing. Paper 16-3 presents design solutions required to build a short latency embedded 512kB L2 Cache that achieves 1.4GHz and 2.6W at 1.3V, 85C. Paper 16-4 discusses how process variation influences the failure mechanisms of SRAM cells and proposes a process tolerant Cache architecture. Paper 16-5 addresses neutron-induced errors in SRAM cells with an analysis of charge-collection-failure (CCF) mode as well as a new parasitic-bipolar-failure (PBF) mode. Design techniques for reduced soft error rate are proposed.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130562035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Simulation and modeling for RF and mixed signal designs - Session 7","authors":"S. Rochel","doi":"10.1109/cicc.2004.1358748","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358748","url":null,"abstract":"There are ever increasing demands for the integration of RF circuits with higher frequencies as well as higher integration scale with shorter design periods. Simulation and modeling for RF and mixed signal designs are key technologies for successful design of high-performance cutting-edge circuits. This session gives a good overview of the modeling techniques available today and their future challenges, together with state-of-the-art solutions for several important issues in the fields.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125136602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Oversampled analog-to-digital converters - Session 25","authors":"D. Thelen","doi":"10.1109/cicc.2004.1358870","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358870","url":null,"abstract":"Electronic systems are on a never-ending march towards higher levels of integration, higher performance, and lower power. You might think that the designers of oversampled analog-to-digital converters would cower and beg for relaxed specifications, but instead they are boldly going where no one has gone before to meet these challenges. Several brave explorers have agreed to come and share their secrets with us in this session.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122723844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Wireless transmitters - Session 26","authors":"A. Niknejad","doi":"10.1109/cicc.2004.1358878","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358878","url":null,"abstract":"Wireless transmitters play an important role in the design of integrated radio circuitry for many present and upcoming standards of communication. New radio standards require transmitters to operate with much higher levels of linearity while realizing complete integration while new applications require higher frequency of operation.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128837820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"RF noise modeling and analysis - Session 17","authors":"Yuhua Cheng, H. Vuong","doi":"10.1109/cicc.2004.1358821","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358821","url":null,"abstract":"The increasing demand for low cost, high performance, highly-integrated solution for RF mobile communication products and the time-to-market pressure have made the design cycle much shorter. It becomes a challenge to predict noise accurately at the early stages of a top down design. In digital circuits, noise can cause the circuit to switch incorrectly and also causes other concerns on power, timing and reliability. The circuit needs to be optimized with careful consideration of noise in addition to accounting for other important factors such as delay, power and area. In RF circuits, noise, generated either within the devices or in other parts of the IC (such as from digital switching noise coupled through the power supply lines, the chip interconnect and the IC substrate) can cause distortions and interference with other signals in the spectrum. Noise modeling is becoming increasingly important in circuit design and optimization.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114733209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}