Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)最新文献

{"title":"ESD protection - Session 12","authors":"M. Zachariah, R. Aitken","doi":"10.1109/cicc.2004.1358786","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358786","url":null,"abstract":"Electrostatic discharge is a serious reliability problem for integrated circuits. As deep sub-micron technologies advance, the challenges of designing and implementing robust ESD protections have become more acute. Wire and diffusion resistance have increased with scaling. ESD sensitivity due to ultra-thin gate oxides has also increased, while the voltage needed to bias diodes into conduction has remained the same as previous technology generations. All of these issues bring to bear the need for design, simulation and analysis of ESD protections in deep sub-micron technologies.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127855899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Precision level output devices - Session 9","authors":"D. Rich, R. Carley","doi":"10.1109/cicc.2004.1358765","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358765","url":null,"abstract":"The first half of the session centers on the design of mixed-signal ICs that convert analog signals to pulse width modulated signals for the purpose of building high-efficiency amplifiers. After the break, our attention turns to high-performance Nyquist rate digital-to-analog converters. These are compelling topics of timely relevance and practical interest. In this session, we have a confluence of some of the best work that attacks highly intriguing open issues on the subject. The session kicks off with a description of a uniformly-sampled class D amplifier implemented in a 90 nanometer digital CMOS process. The paper addresses the challenges of handling relatively high-voltage power supplies that are switched at the output of a chip implemented in a deep submicron process. The output signal is tri-level. Continuing with a similar theme, the second paper alternatively adopts a discrete-sampled class-D implementation. A period randomly selected by a pseudo random-number generator replaces the fured-clock period. An interesting implementation of a delta-sigma modulator, replacing the traditional configuration of the first two authors, is discussed in our next paper. A seventh-order single-loop single-bit modulator is used. The switching transistors are wedged inside the feedback loop, creating design challenges due to the complex impedance of the load. A delta-sigma structure is also at the heart of our fourth paper, though in this instance, the authors adopt an asynchronous approach in the absence of sampling operations. The circuit operates in the current domain. First-and second order modulator structures are compared. Shifting to an invited tutorial paper on the design of current-steering digital-to-analog converters, our guest speaker examines the role of this technique when improving the linearity and sampling rates of digital-to-analog converters. Calibration methods for the current sources, effects of finite-output resistance, suppression of data-dependent errors, and current-switching circuits will be covered. We conclude with a mismatched-shaping technique to improve matching of the data converter. While this method has been popularized in delta-sigma structures, our presenter offers a new twist on the theme, and considers its implementation in a Nyquist digital-to-analog converter. From this, new techniques for shaping the output spectrum of the clock signal are derived.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124773946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Broadband circuits and freguency synthesis - Session 28","authors":"F. Svelto","doi":"10.1109/cicc.2004.1358896","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358896","url":null,"abstract":"Traditionally, RF circuits were required to process signals in a narrow band around the carrier. Recently, broadband applications and multi-standard requirements are driving the development of broad-band RF circuit techniques. The first four papers in this session propose interesting designs for several broad-band circuits.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128844133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Evenina panel discussion - Session 21","authors":"J. Mechler","doi":"10.1109/cicc.2004.1358854","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358854","url":null,"abstract":"Micro-electromechanical systems, or MEMS, and nanotechnology have been billed as \"The Next Big Thing\" by many industry analysts. Technology companies and government laboratories have been pouring billions of dollars into research and development into the design and manufacturing processes which allow tiny mechanical devices such as sensors for temperature, pressure, and vibration, valves, actuators, micro mirrors, gyroscopes, and other micro-scale mechanical devices to be embedded into semiconductor chips. Commercial applications for MEMS range from automotive where MEMS sensors are used for pressure and acceleration measurement or airbag deployment, to optical telecommunications RF switches, to construction where building materials sense changes in mechanical stresses and medical applications where MEMS are used in micron-sized blood pressure sensors, disposable angioplasty devices which monitor pressure in balloon catheters, kidney dialysis pressure sensors or airflow sensors in respiratory equipment. But is the price tag too high for MEMS development and manufacturing, which has been estimated by Vertical Market Research at $3.3 billion US R&D dollars by 2007, and will the payback be too little too late?","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129303586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low power issues for FPGAs - Session 32","authors":"Brian Fitzgerald, S. Wilton","doi":"10.1109/cicc.2004.1358926","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358926","url":null,"abstract":"Power dissipation is becoming a major concern for semiconductor vendors and customers. If current design trends continue, a typical microprocessor will consume 50 times more power than that can be supported by cost-effective packaging techniques by 2016. FPGAs will not escape this trend; already, FPGA vendors report that power consumption is one of the primary concerns of their customers. Compared to ASICs and other custom chips, FPGAs contain long routing tracks with significant parasitic capacitance; during high speed operations, the switching activity on these long routing tracks causes significant power dissipation. Thus, the development of low-power techniques for FPGAs is very important.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116942187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Emerging technigues in SIP and SoC - Session 31","authors":"","doi":"10.1109/cicc.2004.1358917","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358917","url":null,"abstract":"This session presents emerging technologies that facilitate the integration of system-in-package (SIP) or system-on-chip (SOC). This includes the integration, in a single package or a single chip, of non-transistor components such as electro-mechanical-devices, integrated antennas, high-quality inductors, and image sensors. The first two papers are invited tutorials. The first invited paper gives an overview of different approaches for the integration of multi-chip system-in-packages. The second invited paper gives an overview on the design of microsystems. These microsystems include different types of integrated sensors or actuators. The remaining four papers highlight specific technology advances. The first of these papers shows a system that includes a MEMS strain sensor interfaced with CMOS electronics that improves any prior strain sensing technology. The next paper shows new results in the implementation of integrated antennas in silicon substrates. Experimental data shows the feasibility of free-space communication with these integrated antennas. The next paper shows a low-power voltage-controlled oscillator with a thin-film post-processed inductor. This type of inductor has a high quality factor of 40 at a target frequency of 5 GHz. The final paper shows a CMOS 3D camera chip. The chip includes an array of 32x32 extremely sensitive image sensors. A time-of-flight measurement technique is used to calculate distances between a target scene and the chip camera sensors.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"162 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130107512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Memory trends - Session 20","authors":"T. Akioka, B. Prince","doi":"10.1109/cicc.2004.1358847","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358847","url":null,"abstract":"This session presents trends in embedded and emerging memories including an overview of issues for advanced embedded SRAM and DRAM and discussion of high density FeRAM and tunnel junction MRAM. A novel gain cell using a single electron transistor for SRAM-type data storage is described along with a new ternary CAM macro and an on-chip programmable CMOS based OTP anti-fuse.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128546495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Desien for testability - Session 10","authors":"R. Aitken","doi":"10.1109/cicc.2004.1358774","DOIUrl":"https://doi.org/10.1109/cicc.2004.1358774","url":null,"abstract":"Design for Testability OFT) is one of the most cost-effective ways in which to tackle test problems, reduce the cost of test and decrease the time-to-market. DFT techniques for digital circuits are used widely, whereas little is known about DFT for mixed-signal circuits. This session is devoted to describing several methods for mixedsignal DFT of high-speed VOs, in particular, those related to Intel product offerings, together with two papers on A/D converter circuits.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127079760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}