Precision level output devices - Session 9

D. Rich, R. Carley
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Abstract

The first half of the session centers on the design of mixed-signal ICs that convert analog signals to pulse width modulated signals for the purpose of building high-efficiency amplifiers. After the break, our attention turns to high-performance Nyquist rate digital-to-analog converters. These are compelling topics of timely relevance and practical interest. In this session, we have a confluence of some of the best work that attacks highly intriguing open issues on the subject. The session kicks off with a description of a uniformly-sampled class D amplifier implemented in a 90 nanometer digital CMOS process. The paper addresses the challenges of handling relatively high-voltage power supplies that are switched at the output of a chip implemented in a deep submicron process. The output signal is tri-level. Continuing with a similar theme, the second paper alternatively adopts a discrete-sampled class-D implementation. A period randomly selected by a pseudo random-number generator replaces the fured-clock period. An interesting implementation of a delta-sigma modulator, replacing the traditional configuration of the first two authors, is discussed in our next paper. A seventh-order single-loop single-bit modulator is used. The switching transistors are wedged inside the feedback loop, creating design challenges due to the complex impedance of the load. A delta-sigma structure is also at the heart of our fourth paper, though in this instance, the authors adopt an asynchronous approach in the absence of sampling operations. The circuit operates in the current domain. First-and second order modulator structures are compared. Shifting to an invited tutorial paper on the design of current-steering digital-to-analog converters, our guest speaker examines the role of this technique when improving the linearity and sampling rates of digital-to-analog converters. Calibration methods for the current sources, effects of finite-output resistance, suppression of data-dependent errors, and current-switching circuits will be covered. We conclude with a mismatched-shaping technique to improve matching of the data converter. While this method has been popularized in delta-sigma structures, our presenter offers a new twist on the theme, and considers its implementation in a Nyquist digital-to-analog converter. From this, new techniques for shaping the output spectrum of the clock signal are derived.
精密电平输出装置。第9节
会议的前半部分集中于混合信号ic的设计,它将模拟信号转换为脉宽调制信号,以构建高效放大器。休息后,我们的注意力转向高性能奈奎斯特速率数模转换器。这些都是具有及时相关性和实际意义的引人注目的主题。在这次会议上,我们汇集了一些最好的作品,这些作品攻击了这个主题上非常有趣的开放问题。会议以描述在90纳米数字CMOS工艺中实现的均匀采样D类放大器开始。本文解决了处理在深亚微米工艺中实现的芯片输出处切换的相对高压电源的挑战。输出信号为三电平。继续类似的主题,第二篇论文采用离散采样的d类实现。伪随机数生成器随机选择的周期代替未来时钟周期。我们将在下一篇文章中讨论delta-sigma调制器的一个有趣的实现,它取代了前两位作者的传统配置。采用七阶单回路单比特调制器。开关晶体管被楔入反馈回路中,由于负载的复杂阻抗,这给设计带来了挑战。delta-sigma结构也是我们第四篇论文的核心,尽管在这种情况下,作者在没有采样操作的情况下采用了异步方法。电路在电流域中工作。比较了一阶和二阶调制器结构。我们的演讲嘉宾将在一篇关于电流转向数模转换器设计的特邀教程论文中探讨该技术在改善数模转换器的线性度和采样率方面的作用。将涵盖电流源的校准方法、有限输出电阻的影响、数据相关误差的抑制以及电流开关电路。最后,我们提出了一种不匹配整形技术来改善数据转换器的匹配。虽然这种方法已经在delta-sigma结构中普及,但我们的主讲人提供了一个新的主题,并考虑其在奈奎斯特数模转换器中的实现。在此基础上,导出了对时钟信号输出频谱进行整形的新技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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