{"title":"可测试性设计-第10部分","authors":"R. Aitken","doi":"10.1109/cicc.2004.1358774","DOIUrl":null,"url":null,"abstract":"Design for Testability OFT) is one of the most cost-effective ways in which to tackle test problems, reduce the cost of test and decrease the time-to-market. DFT techniques for digital circuits are used widely, whereas little is known about DFT for mixed-signal circuits. This session is devoted to describing several methods for mixedsignal DFT of high-speed VOs, in particular, those related to Intel product offerings, together with two papers on A/D converter circuits.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Desien for testability - Session 10\",\"authors\":\"R. Aitken\",\"doi\":\"10.1109/cicc.2004.1358774\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design for Testability OFT) is one of the most cost-effective ways in which to tackle test problems, reduce the cost of test and decrease the time-to-market. DFT techniques for digital circuits are used widely, whereas little is known about DFT for mixed-signal circuits. This session is devoted to describing several methods for mixedsignal DFT of high-speed VOs, in particular, those related to Intel product offerings, together with two papers on A/D converter circuits.\",\"PeriodicalId\":407909,\"journal\":{\"name\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/cicc.2004.1358774\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/cicc.2004.1358774","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design for Testability OFT) is one of the most cost-effective ways in which to tackle test problems, reduce the cost of test and decrease the time-to-market. DFT techniques for digital circuits are used widely, whereas little is known about DFT for mixed-signal circuits. This session is devoted to describing several methods for mixedsignal DFT of high-speed VOs, in particular, those related to Intel product offerings, together with two papers on A/D converter circuits.