{"title":"CMOS缩放和替代方案-第11部分","authors":"L. Wissel","doi":"10.1109/cicc.2004.1358780","DOIUrl":null,"url":null,"abstract":"This session presents a set of papers related both to CMOS scaling and also to the implementation of features to enhance CMOS performance independent of scaling, either in the digital domain or extended to the RF domain. This session begins and ends with Invited papers, and includes between them two papers on the coveted goal of achieving performance gains in an existing technology generation.","PeriodicalId":407909,"journal":{"name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CMOS scaling and alternatives - Session 11\",\"authors\":\"L. Wissel\",\"doi\":\"10.1109/cicc.2004.1358780\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This session presents a set of papers related both to CMOS scaling and also to the implementation of features to enhance CMOS performance independent of scaling, either in the digital domain or extended to the RF domain. This session begins and ends with Invited papers, and includes between them two papers on the coveted goal of achieving performance gains in an existing technology generation.\",\"PeriodicalId\":407909,\"journal\":{\"name\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/cicc.2004.1358780\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/cicc.2004.1358780","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This session presents a set of papers related both to CMOS scaling and also to the implementation of features to enhance CMOS performance independent of scaling, either in the digital domain or extended to the RF domain. This session begins and ends with Invited papers, and includes between them two papers on the coveted goal of achieving performance gains in an existing technology generation.