2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)最新文献

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Adaptive wavelet stochastic collocation for resonant transmission line circuits 谐振传输线电路的自适应小波随机配置
Alan Yang, Xu Chen, J. Schutt-Ainé, A. Cangellaris
{"title":"Adaptive wavelet stochastic collocation for resonant transmission line circuits","authors":"Alan Yang, Xu Chen, J. Schutt-Ainé, A. Cangellaris","doi":"10.1109/EPEPS.2017.8329729","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329729","url":null,"abstract":"An adaptive wavelet stochastic collocation method for uncertainty quantification is applied to a resonant circuit with stochastic parameters. The outputs of many electrical systems vary rapidly with respect to internal random parameters, for example due to resonance conditions. Accurate and efficient characterization of output statistics is key in designing systems with irregularities, but poses a challenge for conventional sampling-based stochastic collocation methods. The adaptive method in this paper constructs a hierarchical sparse grid approximation using wavelet basis functions. Since wavelet expansion coefficients are rigorous error estimators, wavelet sparse grids can potentially meet error tolerances with optimal efficiency and outperform local polynomial and other adaptive finite-element methods. The advantages and efficiency of this method is explored in the context of the circuit problem presented.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130386344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new approach to mitigate PCI express Gen4 crosstalk from sideband signals in connectors 一种缓解连接器边带信号中PCI express Gen4串扰的新方法
Yaping Zhou, Wenjun Shi, Sunil R. Sudhakaran
{"title":"A new approach to mitigate PCI express Gen4 crosstalk from sideband signals in connectors","authors":"Yaping Zhou, Wenjun Shi, Sunil R. Sudhakaran","doi":"10.1109/EPEPS.2017.8329754","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329754","url":null,"abstract":"RC termination for sideband signals is required in PCIe Gen4 Card Electromechanical specification to reduce crosstalk in PCIe connectors. A new approach to reduce crosstalk is proposed in this paper. This approach doesn't require extra components, and simulation results show that the new proposal can achieve even better electrical performance.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"59 8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126077360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Field-circuit coextraction of systems with interconnects and circuit components 带有互连器件和电路元件的系统的现场电路提取
Jian Liu, Kaiyu Mao, Xiande Cao, Yingxin Sun, Anyu Kuo
{"title":"Field-circuit coextraction of systems with interconnects and circuit components","authors":"Jian Liu, Kaiyu Mao, Xiande Cao, Yingxin Sun, Anyu Kuo","doi":"10.1109/EPEPS.2017.8329713","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329713","url":null,"abstract":"A field-circuit coextraction method is proposed for the 3D full-wave model extraction of systems with interconnects and surface mounting circuit components. Local metal patches are added to each circuit component based on the pins and circuit profile. The voltage and the current continuity between fields and circuits are enforced through internal ports defined on the artificial reference patches.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126907923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
DC blocking capacitor interfacing for high speed communication buses 用于高速通信总线的直流阻塞电容接口
Junyan Tang, J. Hejase, M. Richardson, D. Dreps, W. Becker, Y. Kwark, J. Audet, C. Baks
{"title":"DC blocking capacitor interfacing for high speed communication buses","authors":"Junyan Tang, J. Hejase, M. Richardson, D. Dreps, W. Becker, Y. Kwark, J. Audet, C. Baks","doi":"10.1109/EPEPS.2017.8329752","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329752","url":null,"abstract":"This paper studies integration aspects of DC blocking capacitors in differential high speed bus channels. The presence of a DC blocking capacitor in the signal path can present an impedance mismatched medium which can lead to signal degradation. Integrating the capacitor to minimize impedance mismatches becomes of high importance. The differential impedance of a micro-strip differential pair is evaluated in simulation under different physical design conditions. Additionally, test vehicle measurements for a variety of capacitor test sites with different characteristics including: package size, voiding scenarios under capacitor pads/packages and wiring layers for traces to the capacitors has been designed and fabricated. The test sites are measured up to 20GHz using a VNA and their results are discussed. Also, several of the test sites are simulated in order to validate the modelling method for future design analysis purposes.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121858359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Black-box optimization of 3D integrated systems using machine learning 使用机器学习的三维集成系统的黑盒优化
H. Torun, M. Swaminathan
{"title":"Black-box optimization of 3D integrated systems using machine learning","authors":"H. Torun, M. Swaminathan","doi":"10.1109/EPEPS.2017.8329698","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329698","url":null,"abstract":"Increasing complexity of electronics originates new challenges to system optimization. This work proposes a new black box optimization algorithm based on machine learning to address these challenges and analyzes its performance for clock skew minimization of 3D integrated systems.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131249108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Effect of NEXT coupling in close proximity to receiver of 25Gb/s bus 25Gb/s总线接收器附近NEXT耦合的影响
P. Paladhi, J. Hejase, N. Pham, Ghadir Gholami, P. Jayaraman, Megan Nguyen, Glen A. Wiedemeier, D. Dreps
{"title":"Effect of NEXT coupling in close proximity to receiver of 25Gb/s bus","authors":"P. Paladhi, J. Hejase, N. Pham, Ghadir Gholami, P. Jayaraman, Megan Nguyen, Glen A. Wiedemeier, D. Dreps","doi":"10.1109/EPEPS.2017.8329750","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329750","url":null,"abstract":"This paper demonstrates the deleterious effect of Near End Cross Talk (NEXT) on 25.78 Gb/s communication links from proximity of aggressors to the victim's receiver end. Modeling studies and experimental results clearly indicate that at these higher data rates, even shorter lengths 2mm) of tight coupling could effectively close the eye, particularly when the coupling is near the victim's receiver end. Hence particular care must be taken in layout design of constrained areas like chip package to ensure this form of NEXT coupling happening near the victim receiver end is avoided.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114125549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A hybrid land grid array socket connector design for achieving higher signalling data rates 一种用于实现更高信号数据速率的混合地面电网阵列插座连接器设计
J. Hejase, S. Chun, W. Becker, D. Dreps, B. Beaman
{"title":"A hybrid land grid array socket connector design for achieving higher signalling data rates","authors":"J. Hejase, S. Chun, W. Becker, D. Dreps, B. Beaman","doi":"10.1109/EPEPS.2017.8329761","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329761","url":null,"abstract":"This paper presents an improved hybrid land grid array socket connector design enabling high speed bus signaling data rates up to 50Gb/s. Observed limitations in an existing connector such as impedance mismatches and crosstalk are treated and improved. The improved connector structural differences from the existing connector are presented and motivated. Electromagnetic modelling for the improved and existing connectors has been carried out to validate the design concept and compare signal integrity properties.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122015749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design optimization of a planar spiral inductor using space mapping 平面螺旋电感的空间映射优化设计
Felipe de J. Leal-Romo, Marisol Cabrera-Gómez, J. Rayas-Sánchez, Daniel Garcia-Mora
{"title":"Design optimization of a planar spiral inductor using space mapping","authors":"Felipe de J. Leal-Romo, Marisol Cabrera-Gómez, J. Rayas-Sánchez, Daniel Garcia-Mora","doi":"10.1109/EPEPS.2017.8329706","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329706","url":null,"abstract":"This paper addresses the implementation of a computationally efficient optimization technique for designing structures simulated in 3D electromagnetic field solvers. A probe of concept is done by the EM-based optimization of a planar spiral inductor for high-power applications. The optimization technique employed is based on space mapping (SM) methods, more specifically on the Broyden-based input space mapping algorithm. Our optimization results confirm the efficiency of the proposed approach.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126527572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
An indirect measurement method for S-parameters which is based on reduction to eigenvalue problem 基于特征值约简问题的s参数间接测量方法
N. Maeda, S. Fukui, T. Sekine, Yasuhiro Takahashi
{"title":"An indirect measurement method for S-parameters which is based on reduction to eigenvalue problem","authors":"N. Maeda, S. Fukui, T. Sekine, Yasuhiro Takahashi","doi":"10.1109/EPEPS.2017.8329755","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329755","url":null,"abstract":"A novel measurement method for the S-parameters of multiport circuit with some of its ports not directly measured is proposed. We solve this problem by reducing it to an eigenvalue problem. In this paper, the method has been extended to circuits where the number of direct-measured ports exceeds that of indirect-measured ports. A numerical example shows its validity.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"461 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123648311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A method for creating behavioral models of oscillators using augmented neural networks 利用增强神经网络建立振子行为模型的方法
Huan Yu, M. Swaminathan, C. Ji, David White
{"title":"A method for creating behavioral models of oscillators using augmented neural networks","authors":"Huan Yu, M. Swaminathan, C. Ji, David White","doi":"10.1109/EPEPS.2017.8329714","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329714","url":null,"abstract":"This paper describes a novel technique to model the nonlinear time-domain behavior of oscillators using augmented neural networks. In the proposed method, a feed forward neural network with a periodic unit is used to capture the periodicity of the oscillatory output waveform. As opposed to the state space model, which is based on a system of differential equations, the output of the oscillator is generated explicitly using the neural network presented in this paper. The model is trained using the data obtained from the simulation of transistor-level circuit models. Examples applied to ring oscillators show the advantages using this method based on CPU time and accuracy. The proposed model is compatible with Verilog-A.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125653614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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