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2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)最新文献

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The accuracy of port connections between layers in printed circuit board 印刷电路板层与层之间端口连接的准确性
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329731
S. Bai, Chenxi Huang, A. Ruehli, S. Scearce, J. Drewniak
{"title":"The accuracy of port connections between layers in printed circuit board","authors":"S. Bai, Chenxi Huang, A. Ruehli, S. Scearce, J. Drewniak","doi":"10.1109/EPEPS.2017.8329731","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329731","url":null,"abstract":"Port-connected models are widely used in many applications such as printed circuit board models. Much compute time can be saved by using only ports to connect the printed circuit board layers. The accuracy of port connected models is investigated in this paper for the relevant frequency range for PDN applictions. In this short paper, we use a specific three layer structure to study the coupling among closely located ports which connect the two layers.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123099505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analytical evaluation of partial inductances with retardation 带延迟的部分电感的分析评定
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329715
L. Lombardi, G. Antonini, A. Ruehli
{"title":"Analytical evaluation of partial inductances with retardation","authors":"L. Lombardi, G. Antonini, A. Ruehli","doi":"10.1109/EPEPS.2017.8329715","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329715","url":null,"abstract":"The Partial Element Equivalent Circuit (PEEC) circuit oriented electromagnetic method has been found particularly useful for modeling PCBs, interconnects, and 3-D problems involving both electromagnetic computations and circuits. Efficiency improvements in PEEC for higher frequencies are becoming important especially for large aspect ratio cells. The analytical solution of the six-fold integrals has been shown to lead to a very efficient solution for such integrals. In this paper we introduce a new approach for the analytical evaluation of retarded partial inductances at arbitrary distances.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115066981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Matrix formulations & GPU acceleration for high-speed digital link simulations 矩阵公式和GPU加速高速数字链路模拟
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329699
Sunil R. Sudhakaran, Arash Zargaran-Yazd
{"title":"Matrix formulations & GPU acceleration for high-speed digital link simulations","authors":"Sunil R. Sudhakaran, Arash Zargaran-Yazd","doi":"10.1109/EPEPS.2017.8329699","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329699","url":null,"abstract":"Investigations on how to speed up channel simulation by using various approaches. A novel multidimensional matrix based convolution approach using FFTs is proposed versus iterative for loops or single dimension serial convolutions. Experiments conducted showed that speedups achieved with GPUs can be three times as fast as CPUs including data transfer overhead.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130907848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MIP: Moment-based interpolation projection for parameterized reduced models of the DC operating point in nonlinear circuits 非线性电路中直流工作点参数化简化模型的矩基插值投影
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329726
Y. Tao, B. Nouri, E. Gad, M. Nakhla, Q. Sun, R. Achar
{"title":"MIP: Moment-based interpolation projection for parameterized reduced models of the DC operating point in nonlinear circuits","authors":"Y. Tao, B. Nouri, E. Gad, M. Nakhla, Q. Sun, R. Achar","doi":"10.1109/EPEPS.2017.8329726","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329726","url":null,"abstract":"A new approach is proposed to construct reduced order models for the DC operating point of nonlinear circuits, parametrized by key design parameters. The proposed approach is based on utilizing the interpolation and projection operations to construct the reduced systems.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133983824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Chip/package co-analysis and inductance extraction for fan-out wafer-level-packaging 扇形圆片级封装的芯片/封装联合分析和电感提取
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329749
Yarui Peng, D. Petranovic, S. Lim
{"title":"Chip/package co-analysis and inductance extraction for fan-out wafer-level-packaging","authors":"Yarui Peng, D. Petranovic, S. Lim","doi":"10.1109/EPEPS.2017.8329749","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329749","url":null,"abstract":"Advanced packaging technology integrates multiple dies closely with package routing for higher performance and lower power. However, electrical and magnetic field interaction between chip wires and package requires careful parasitic extraction. For the first time, we provide comprehensive CAD flows for extracting parasitic inductance elements in the package-to-die (P2D) interface layers. We propose new full-chip loop-based inductance extraction methodologies using halo ground and bundle creation. This extraction engine is integrated in our P2D flow to extract chip/package inductive coupling elements efficiently and accurately. Our extraction engine needs only 0.63s computing time with an average self and mutual inductance error of 2.8% and 5.3%.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116027485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Acceleration of shielding effectiveness analysis using stable FDTD subgridding 稳定时域有限差分分段加速屏蔽效能分析
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329725
Fadime Bekmambetova, Xinyue Zhang, P. Triverio
{"title":"Acceleration of shielding effectiveness analysis using stable FDTD subgridding","authors":"Fadime Bekmambetova, Xinyue Zhang, P. Triverio","doi":"10.1109/EPEPS.2017.8329725","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329725","url":null,"abstract":"Even though it is desirable to fully shield computer components from external electromagnetic field, this cannot be done due to the need for ventilation. The finite-difference time-domain (FDTD) method can be used to analyze the shielding effectiveness of a computer enclosure with apertures. The multiscale nature of this problem calls for the use of a locally refined grid (subgridding), which however can compromise FDTD stability. We present a systematic approach to create provably-stable FDTD subgridding schemes and investigate their ability to accelerate the assessment of shielding effectiveness.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"146 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128436652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Noise based rail isolation determination in spatially distributed IVR PDNs 空间分布IVR pdn中基于噪声的轨道隔离判定
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329740
C. Kuan, A. Jain, Sameer Shekhar, Sanjiv C. Soman
{"title":"Noise based rail isolation determination in spatially distributed IVR PDNs","authors":"C. Kuan, A. Jain, Sameer Shekhar, Sanjiv C. Soman","doi":"10.1109/EPEPS.2017.8329740","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329740","url":null,"abstract":"This paper presents design considerations for grouping multiple loads to a common power plane. Power management & VR low load efficiency are covered briefly. The main focus is power integrity aspects to address differing load excitations, noise sensitivities, and wide spatial distribution. Design guidelines are illustrated with an example supported by simulation and experimental data.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122132939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Analysis of integrated metal seal ring resonance 集成金属密封圈共振分析
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329727
M. Jacques, D. Denis, S. Bouvier, Alireza Samani, F. Mounaim, D. Plant
{"title":"Analysis of integrated metal seal ring resonance","authors":"M. Jacques, D. Denis, S. Bouvier, Alireza Samani, F. Mounaim, D. Plant","doi":"10.1109/EPEPS.2017.8329727","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329727","url":null,"abstract":"After linking an 80-GHz insertion loss peak in a silicon capacitor to the lambda/2 resonance of parasitic transmission lines enabled by its integrated metal seal ring, we develop a model characterizing such resonances.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129795703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
FastAAA: A fast rational-function fitter FastAAA:一个快速的有理函数筛选器
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329756
A. Hochman
{"title":"FastAAA: A fast rational-function fitter","authors":"A. Hochman","doi":"10.1109/EPEPS.2017.8329756","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329756","url":null,"abstract":"FastAAA is an algorithm for fitting rational-functions to a set of N data samples. In each step of the algorithm, it computes an order n fit via a fast, O(Nn), update of the previous order n − 1 fit. The algorithm stops at the first order that yields an acceptable error. The errors of the fits of orders 1… n, are evaluated in O(Nn2) operations. If the data can be represented exactly with n poles, the algorithm is guaranteed to stop after n iterations (in exact arithmetic). It is possible to fit p rational-functions, sharing the same set of poles, to p sets of data, in O(pNn2) operations. The stability of the poles and Hermitian symmetry of the fit can be guaranteed.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115586057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Inductance model of decoupling capacitors including the local environment 考虑局部环境的去耦电容电感模型
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2017-10-01 DOI: 10.1109/EPEPS.2017.8329734
T. Makharashvili, Y. S. Cao, A. Ruehli, J. Drewniak, D. Beetner
{"title":"Inductance model of decoupling capacitors including the local environment","authors":"T. Makharashvili, Y. S. Cao, A. Ruehli, J. Drewniak, D. Beetner","doi":"10.1109/EPEPS.2017.8329734","DOIUrl":"https://doi.org/10.1109/EPEPS.2017.8329734","url":null,"abstract":"The key purpose of power distribution networks is to maintain a low impedance power source for integrated circuit(s) for the stable supply voltage. In this paper, using the equivalent series capacitor inductance leads to inaccurate estimates of power bus impedance. A simple modeling approach is presented to estimate the inductance associated with the decoupling capacitors which accounts for the capacitor geometry, for connections to the capacitor, and for the capacitor height above the return plane.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122690100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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