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2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES)最新文献

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Diagnosis of Epilepsy Utilizing Time-Series Distribution of EEG Signals 利用脑电图信号时间序列诊断癫痫
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436630
Nasrin Khiabanmanesh, A. Amini, Sara Mihandoost
{"title":"Diagnosis of Epilepsy Utilizing Time-Series Distribution of EEG Signals","authors":"Nasrin Khiabanmanesh, A. Amini, Sara Mihandoost","doi":"10.23919/MIXDES.2018.8436630","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436630","url":null,"abstract":"Epilepsy is a set of chronic neurological syndromes produced by sudden and transient electrical disorders in brain. Doctors perform different experiments to detect the epilepsy and type of it. Most common and the best way to epilepsy detection is analyzing electroencephalogram (EEG) signals. In this paper, we present a new method for classifying the brain activities in order to detect epilepsy seizures. The proposed method is based on time-frequency analysis of EEG signals using stationary wavelet transform (SWT). At first, four level SWT of EEG signal is obtained and then the coefficients are down-sampled with factor 2. After that, the local binary pattern (LBP) of the obtained coefficients are calculated and LBP coefficients are modeled with GARCH model. The parameters of GARCH model construct the feature vector and K-nearest neighbor and support vector machine (SVM) classifiers are used for classification. Results show that our proposed method has the better classification accuracy than the recently proposed methods.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121155512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modelling and Cancellation of the Stimulation Artifact for ASIC-based Bidirectional Neural Interface 基于asic的双向神经接口刺激伪影建模与消除
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436947
Karolina Kolodziej, M. Szypulska, W. Dąbrowski, P. Hottowy
{"title":"Modelling and Cancellation of the Stimulation Artifact for ASIC-based Bidirectional Neural Interface","authors":"Karolina Kolodziej, M. Szypulska, W. Dąbrowski, P. Hottowy","doi":"10.23919/MIXDES.2018.8436947","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436947","url":null,"abstract":"Electrical stimulation of neurons results in large artifacts that makes recording of the stimulated activity difficult. In particular, detection of low-latency spikes from directly activated neurons at the stimulating electrodes remains virtually impossible. We tested a new idea for artifact reduction, based on an optimized correction pulse applied to the stimulating electrode instantly after the stimulation pulse. The correction pulse is expected to generate its own artifact compensating the remaining artifact resulting from the stimulation pulse. We verified the model in numerical simulations using realistic model of the electrode impedance and schematic of our new CMOS integrated circuit dedicated to electrical stimulation and recording of neuronal activity. We analyzed the artifact level at the output of the recording amplifier to take into account its filtering properties. The results suggest that our method will allow for reliable detection of responses from activated neurons even on the electrodes generating the stimulation signals.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115670808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Influence of Cooling Conditions of Power LEDs on Their Electrical, Thermal and Optical Parameters 功率led冷却条件对其电学、热学和光学参数的影响
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436629
K. Górecki, Przemysław Ptak, M. Janicki, T. Torzewicz
{"title":"Influence of Cooling Conditions of Power LEDs on Their Electrical, Thermal and Optical Parameters","authors":"K. Górecki, Przemysław Ptak, M. Janicki, T. Torzewicz","doi":"10.23919/MIXDES.2018.8436629","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436629","url":null,"abstract":"This paper presents in depth investigations of the influence of cooling conditions on electrical, optical and thermal parameters of white power LEDs. First, the paper introduces the measurement methodology and the experimental set-ups. Then, the results of electrical and optical measurements obtained for selected power LEDs operating in different cooling conditions are presented and discussed in detail.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115181651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
An Area Equivalent WKB Approach to Calculate the B2B Tunneling Probability for a Numerical Robust Implementation in TFET Compact Models 利用面积等效WKB方法计算ttfet紧凑模型中数值鲁棒实现的B2B隧道概率
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436770
F. Horst, A. Farokhnejad, B. Iñíguez, A. Kloes
{"title":"An Area Equivalent WKB Approach to Calculate the B2B Tunneling Probability for a Numerical Robust Implementation in TFET Compact Models","authors":"F. Horst, A. Farokhnejad, B. Iñíguez, A. Kloes","doi":"10.23919/MIXDES.2018.8436770","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436770","url":null,"abstract":"This paper presents a novel approach to calculate the band-to-band (B2B) tunneling probability in tunnel-field effect transistors (TFETs) for the usage in compact models. The tunneling barrier is defined by a compact solution of the electrostatics and is approximated by an area equivalent triangular profile. For this profile the Wentzel-Kramers-Brillouin approximation (WKB) is applied. Referring to the area instead of the electric field at single points is shown to be more robust regarding numerical stability. By comparing the results of the approach with numerical TCAD Sentaurus simulation data of a double-gate (DG) TFET for various bias conditions and geometric positions within the device, the numerical stability as well as the limitations are demonstrated. Furthermore, the comparison to a quasi-2D WKB approach, the derived model shows a better fit to TCAD data at a reduced complexity.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130234080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS 65 nm CMOS中总电离剂量(TID)实验的标度和温度效应研究
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436809
Loukas Chevas, Aristeidis Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, A. Zografos, G. Borghello, H. D. Koch, F. Faccio
{"title":"Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS","authors":"Loukas Chevas, Aristeidis Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, A. Zografos, G. Borghello, H. D. Koch, F. Faccio","doi":"10.23919/MIXDES.2018.8436809","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436809","url":null,"abstract":"Ten-fold radiation levels are expected in the upgrade of the High-Luminosity Large Hadron Collider (HL-LHC) at CERN. Bulk silicon CMOS at 65 nm offers appreciable advantages among cost, performance, and resilience to high Total Ionizing Dose (TID). In the present paper, geometrical scaling of key analog design parameters of MOS transistors irradiated at high TID is investigated. Experiments are carried out for TID of 100, 200 and up to 500 Mrad(SiO2) and at −30°C, 0°C, and 25°C. We find that parameters are least degraded at −30°C. However, short-channel NMOSTs show a significant degradation of slope factor, which is more severe at 0°C than at 25°C. In contrast, the slope factor in short-channel PMOSTs shows lowest sensitivity to high TID.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130046703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Design of Matrix Controller for Hybrid Pixel Detectors 混合像素检测器的矩阵控制器设计
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436909
Bartosz Tutro, Kacper Urbanski, R. Szczygiel
{"title":"Design of Matrix Controller for Hybrid Pixel Detectors","authors":"Bartosz Tutro, Kacper Urbanski, R. Szczygiel","doi":"10.23919/MIXDES.2018.8436909","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436909","url":null,"abstract":"Hybrid pixel detectors used for radiation imaging consist of a pixelated semiconductor sensor connected to a readout ASIC with a pixel matrix of the same geometry. The achievable frame rate and possible applications of the detector depend heavily on the pixel matrix controlling logic and the chip-to-world interface. In this paper we present the design of a controller for a pixel matrix which provides timing control of the matrix with the resolution of 2.5 ns, and an effective output data rate of 12.8 Gbps, at 400 MHz system clock. The controller was implemented in 40 nm CMOS technology, connected to 64 × 64 matrix of 50 μm × 50 μm pixels.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122407444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A New Approach to Stability Evaluation of Digital Filters 一种新的数字滤波器稳定性评估方法
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436856
Lukasz Grzymkowski, T. Stefański
{"title":"A New Approach to Stability Evaluation of Digital Filters","authors":"Lukasz Grzymkowski, T. Stefański","doi":"10.23919/MIXDES.2018.8436856","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436856","url":null,"abstract":"In this paper, a new numerical method of evaluating digital filter stability is presented. This approach is based on novel root-finding algorithms at the complex plane using the Delaunay triangulation and Cauchy's Argument Principle. The presented algorithm locates unstable zeros of the characteristic equation with their multiplicities. The proposed method is generic and can be applied to a vast range of systems. Verification of this method is presented with benchmarks that include integer-order and fractional-order digital filters.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133764982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Using Verilog-to-Routing Framework for Coarse-Grained Reconfigurable Architecture Routing 使用Verilog-to-Routing框架实现粗粒度可重构架构路由
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436860
Zbigniew Mudza
{"title":"Using Verilog-to-Routing Framework for Coarse-Grained Reconfigurable Architecture Routing","authors":"Zbigniew Mudza","doi":"10.23919/MIXDES.2018.8436860","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436860","url":null,"abstract":"Coarse-Grained Reconfigurable Architectures gain popularity owing to their good energy efficiency and short reconfiguration times, crucial for dynamic reconfiguration. However, due to great diversity of architectures various approaches towards tooling has been adopted. As a result CGRAs lack common synthesis/compiling, placement and routing tools, available for well-developed and standardized FPGAs. This paper presents attempts to adapt and use open-source FPGA design framework Verilog-to-Routing for REuP architecture and a range of similarly constructed CGRAs.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131888650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LED Characterization for Combined Electrical-Optical-Thermal LED Modeling 结合电光热LED建模的LED表征
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436779
G. Farkas, L. Gaal
{"title":"LED Characterization for Combined Electrical-Optical-Thermal LED Modeling","authors":"G. Farkas, L. Gaal","doi":"10.23919/MIXDES.2018.8436779","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436779","url":null,"abstract":"Traditionally incandescent and fluorescent light sources were mostly used in a single operation point and their relevant characteristics was described by a few parameters in a datasheet. The emitted light of LED products depends on current and temperature heavily and the behavior of LEDs in actual use can be predicted only by complex models of physical roots. The paper summarizes the elaboration of the methodology and also actual measurements for identifying parameters of electrical-optical-thermal LED models, all these carried out in the framework of the European Delphi4LED project. Measurement examples of high power LEDs are shown and the state-of-art of the modeling efforts is demonstrated in case studies. First, a model is proposed for separating the recombination effects in the LED junction to radiative and heat generating components. Then a two-diode Spice-like electro-thermal-optical model of LEDs is proposed, extended with a serial resistor in the branch which describes the light emission.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134224214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Learning Robust Feature Representations in Deep Networks for Image Classification 深度网络图像分类鲁棒特征表征学习
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES) Pub Date : 2018-06-01 DOI: 10.23919/MIXDES.2018.8436926
Breton L. Minnehan, A. Savakis
{"title":"Learning Robust Feature Representations in Deep Networks for Image Classification","authors":"Breton L. Minnehan, A. Savakis","doi":"10.23919/MIXDES.2018.8436926","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436926","url":null,"abstract":"Deep learning has emerged as the method of choice for many computer vision applications. Training deep networks involves the utilization of a loss function, such as cross entropy. In this paper, we propose a novel auxiliary loss function, the Silhouette Loss, for training deep networks with the objective of obtaining feature representations that are both tightly clustered and highly separable. We are motivated by the need for well-clustered features that can generalize effectively for the classification of diverse test samples. We also introduce an adaptive scaling scheme for the regularization parameter of the auxiliary loss, which improves robustness and eliminates the selection of another hyperparameter. By training a small network with our auxiliary loss we achieve classification performance that is comparable to that of larger networks, yet our network is more efficient and utilizes much fewer parameters.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121173699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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