Modelling and Cancellation of the Stimulation Artifact for ASIC-based Bidirectional Neural Interface

Abstract

Electrical stimulation of neurons results in large artifacts that makes recording of the stimulated activity difficult. In particular, detection of low-latency spikes from directly activated neurons at the stimulating electrodes remains virtually impossible. We tested a new idea for artifact reduction, based on an optimized correction pulse applied to the stimulating electrode instantly after the stimulation pulse. The correction pulse is expected to generate its own artifact compensating the remaining artifact resulting from the stimulation pulse. We verified the model in numerical simulations using realistic model of the electrode impedance and schematic of our new CMOS integrated circuit dedicated to electrical stimulation and recording of neuronal activity. We analyzed the artifact level at the output of the recording amplifier to take into account its filtering properties. The results suggest that our method will allow for reliable detection of responses from activated neurons even on the electrodes generating the stimulation signals.