Chih-Feng Wang, Li-Zhen Huang, Liang-Ting Chen, Sheng-Yi Yang, C. Shih
{"title":"Fabrication of biomimetic superhydrophobic surfaces through a one step solution-immersion process on galvanized iron substrates","authors":"Chih-Feng Wang, Li-Zhen Huang, Liang-Ting Chen, Sheng-Yi Yang, C. Shih","doi":"10.1109/ICEP.2016.7486917","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486917","url":null,"abstract":"In this study, we used a simple one-step solution-immersion process to rapidly synthesize superhydrophobic Cu coatings on galvanized iron substrates. Scanning electron microscope (SEM), and water contact angle measurements have been performed to characterize the morphological features, chemical composition and superhydrophobicity of the surfaces. The resulting surfaces provided a water contact angle as high as 164° and a sliding as low as 3°. The as prepared superhydrophobic surfaces maintained their superhydrophobicity after pressing. Furthermore, the superhydrophobic Cu coatings on galvanized iron substrates had excellent stability in terms of the contact angle with water after both heating and organic solvent treatment.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114131151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hiroaki Ikeda, S. Sekine, Ryuji Kimura, Koichi Shimokawa, K. Okada, H. Shindo, T. Ooi, Rei Tamaki, Makoto Nagata
{"title":"Fine pitch micro-bump forming by printing","authors":"Hiroaki Ikeda, S. Sekine, Ryuji Kimura, Koichi Shimokawa, K. Okada, H. Shindo, T. Ooi, Rei Tamaki, Makoto Nagata","doi":"10.1109/ICEP.2016.7486824","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486824","url":null,"abstract":"We have examined printing technology which is adaptable to 3DIC bump-forming for (both front-side bump and back-side bump. The materials for bumping require several features for TSV process circumstances and 3DIC stacking followed by reflow. We chose Nano-Function material for the purpose which was initially developed for power semiconductor attachment. The result shows good possibility. 20μm bump pitch capability was confirmed.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"48 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120899355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Kondo, Masaki Yoshida, Munetoshi Kusama, S. Teraki
{"title":"High performance insulating adhesive film for high-frequency applications","authors":"H. Kondo, Masaki Yoshida, Munetoshi Kusama, S. Teraki","doi":"10.1109/ICEP.2016.7486777","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486777","url":null,"abstract":"Recently, continuing growth of highly-functional electronic devices such as wearables is increasing the volume and speed of data transmission and high frequency communication is essential. Thus, device component suppliers must offer products with low transmission loss.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124931161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chan Kim Lee, Wee Hoe, Say Thong Tan, Siang Yeong Tan, Choy Mei Yeow, Chow Soon Lim, Khai Ern See
{"title":"Novel PC miniature board","authors":"Chan Kim Lee, Wee Hoe, Say Thong Tan, Siang Yeong Tan, Choy Mei Yeow, Chow Soon Lim, Khai Ern See","doi":"10.1109/ICEP.2016.7486900","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486900","url":null,"abstract":"The purpose of this article is to showcase the smallest SoC platform design with 4×2.5 inch board size. You can imagine this board as a name-card size. The main intention of this prototype is to enable a new desktop form factor design based on Intel latest essential platform which is Baytrail-Mobile/Desktop. The board design will incorporate lowest platform power solution, golden hardware that can be used for multiple OS. This prototype is a reference design to ODM/OEM to enable lowest pricing product and accelerate the product into market. This new form factor is appropriate for some channels, Mini PC usage, IoT and embedded application.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116603076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nitesh Kumar Sardana, Ritwik Alok Pattnayak, S. Busam, C. Ghosh, L. Biswal
{"title":"Thermal Analysis of a battery in an electronic device for an outdoor application","authors":"Nitesh Kumar Sardana, Ritwik Alok Pattnayak, S. Busam, C. Ghosh, L. Biswal","doi":"10.1109/ICEP.2016.7486808","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486808","url":null,"abstract":"For the effective working of an electronic product, operating temperature of the components on PCB should be below the safe limits. Along with the components, other aspects like the housing material, battery, mountings, connectors etc. should also be analyzed critically from thermal point of view. For safe operation and to avoid any explosion of the battery, temperature in and around battery should be below the limiting temperature. The equipment in consideration is made up of polyester plastic and mounted in an open field, exposed to solar radiations and ambient air. Housing consists of a PCB along with heat dissipating components over it. Components are modelled as lumped models with accurate size, as mentioned in the datasheet. Heat is transferred from the components to the board through conduction. This heat is spread from the board to internal air through convection and radiation. Solar flux transfers the heat to the housing through radiations, which in turn transfers heat to internal air through convection and radiation. At thermal steady state, in-flow and out-flow of heat between internal air and ambient air is balanced. In this paper, surface temperature and ambient temperature around the battery is analyzed at different air flows and different orientations to comment on the appropriate position for placing the product. This will also help in evaluating pertinent time for replacement of battery and the maintenance cost of the product. Steady state thermal simulation is carried out in FloTHERM™. The situation duplicated is maximum temperature in the geographical region with maximum solar flux and various air flows that the product may experience in its life time. The simulation model consists of the entire product and air domain. All three modes of heat transfer (i.e. conduction, convection and radiation) are considered.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123005092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Study on electrical characteristics of micron-order wiring with nano-scale conductive metal particle","authors":"Masaya Tanaka, Tsuyoshi Tsunoda, S. Sagara","doi":"10.1109/ICEP.2016.7486868","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486868","url":null,"abstract":"In recent years, the substrate which achieves low-cost manufacturing and high density wiring is strongly demanded for the next generation high performance computing. Therefore, we developed the process of micron-order wiring with printing nano-scale conductive particle. This process has two noble technologies. One is micron order trench forming and another is printing and sintering. In this time, we developed micron order wiring based on above process. Furthermore, we checked DC/AC characteristics and high speed transmission capability on eye patterns of micron order wiring. In this paper, we discuss three items. One is the fine wiring formation process with the paste including nano-scale conductive particle (Cu nano paste). Two is the AC characteristics measured with TEG. The last is electric characteristic on eye pattern analysis results using the actual measurement result. From these experiments, we mention the advantages and disadvantages of micron-order wiring with Cu nano paste.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131402630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Haruka Suzaki, H. Kuwae, A. Okada, Bo Ma, S. Shoji, J. Mizuno
{"title":"ST-quartz/LiTaO3 direct bonding using SiO2 amorphous layers with VUV/O3 pre-treatment for a novel 5G surface acoustic wave device","authors":"Haruka Suzaki, H. Kuwae, A. Okada, Bo Ma, S. Shoji, J. Mizuno","doi":"10.1109/ICEP.2016.7486865","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486865","url":null,"abstract":"This paper describes a novel ST-cut quartz (ST-quartz)/LiTaO3 (LT) direct bonding for surface acoustic wave (SAW) devices of next 5G mobile communication. The ST-quartz and LT were bonded to fabricate temperature compensated piezoelectric substrates using amorphous SiO2 (α-SiO2) intermediate layers. The α-SiO2 thin layer was prepared on each substrate by ion beam sputtering (IBS) to realize highly active bonding interfaces and treated by vacuum ultraviolet irradiation in the presence of oxygen gas (VUV/O3). Then they were bonded under pressure of 5 MPa at 200 °C for 15 min in 100 kPa vacuum atmosphere. The tensile strength of 2.9 MPa was achieved in α-SiO2 substrate which is six times stronger than other samples; without intermediate layers or VUV/O3 pre-treatment. In addition, VUV/O3 bonding was compared with Mega-sonic bonding. VUV/O3 treated sample with AIB method slightly increase the bonding strength and achieved the same level of Mega-sonic bonding sample with AIB. Hence, it is indicated that AIB method could prepare the considerably activated surface even using low vacuum condition and affect effectively to hetero-monocrystalline bonding. This result suggested the proposed ST-quartz/LT direct bonding is a promising technique for future 5G SAW devices.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132132316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Direct bonding and debonding of glass wafers for handling of ultra-thin glass sheets","authors":"K. Takeuchi, M. Fujino, T. Suga","doi":"10.1109/ICEP.2016.7486833","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486833","url":null,"abstract":"In this sturdy, we investigated the bonding and debonding of the glass wafers using Surface Activated Bonding (SAB) method with the Si and Fe intermediate layers. In the fabrication process of the Thin Film Transistors (TFTs) on the ultra thin glass substrates for the display devices, the glass substrates are handled at high temperature and can be easily deformed. In order to achieve the accurate handling of the ultra thin glass substrates, the glass substrates should be bonded to the carrier glasses, and shoul be debonded after the process. We modified the SAB process with the intermediate layers to control the bond strength of the glasses for the handling. The bonding of glasses by the SAB method endured the heating at 350-550°C and the bond strength as surface energy was controllable under under 1 J/m2. Additionally, the appearance of the voids in the interface were detected, and it indicated the similarity to the hydrophilic bonding. The result shows the feasibility of applying this technique as an alternative for the current TFT process.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130298073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Effects of additive formula and plating current density on the interfacial reactions between Sn and Cu electroplated layer","authors":"Hsuan Lee, W. Dow, Chih-Ming Chen","doi":"10.1109/ICEP.2016.7486905","DOIUrl":"https://doi.org/10.1109/ICEP.2016.7486905","url":null,"abstract":"Electroplating Cu technique becomes more and more important in advanced three-dimensional integrated circuit (3D-IC) packaging because of its advantages in the electrical/thermal conductivity, low cost, and hole-filling performance. Formula of the Cu electroplating solution, especially the additive like suppressor, accelerator, and leveler, plays a crucial role in the electroplating process. Previous studies have indicated that some organic impurities originated from the additives were incorporated in the Cu plated layer during the electroplating process. Moreover, the incorporated organic impurities segregated to the interface between the Cu plated layer and solder in a solder joint and led to formation of voids at the Cu/solder interface. In this study, effects of additive formula and plating current density on the Cu/solder interfacial reactions thermally aged at 150 and 200 °C were further investigated. If the additive formula contained only suppressor, the grain size in the Cu electroplated layer became bigger and the void quantity reduced as the current density reduced. However, when accelerator was added in the plating solution, an opposite trend was observed. The grain became smaller and a larger number of voids formed at the Cu/solder interface as the current density reduced.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117304852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Susumu Sawada, Y. Tomita, K. Hirano, Hiromi Morita, Takashi Ichiryu, Masanori Nomura, Koji Kawakita
{"title":"Novel wiring structure for 3D-conformable devices","authors":"Susumu Sawada, Y. Tomita, K. Hirano, Hiromi Morita, Takashi Ichiryu, Masanori Nomura, Koji Kawakita","doi":"10.5104/JIEPENG.10.E16-017-1","DOIUrl":"https://doi.org/10.5104/JIEPENG.10.E16-017-1","url":null,"abstract":"Wearable products or biosensors require conformability to a complex curved surface or stretching and moving shapes such as parts of the human body. However, it is difficult to apply conventional printed wiring boards (PWBs) or flexible printed circuits (FPCs) to these applications. This situation prompted us to develop a novel wiring structure suitable for 3D-conformable devices. Our structure is composed of spiral-shaped metal wiring and a polymeric insulating layer that has a similar shape. This wiring structure has the following key features: (1) 3D conformability that combines deformability with robustness, (2) low and unchanging electrical resistance during stretching, and (3) a process applicability that allows solder mounting processes or photo processes to be employed to manufacture this device. In this paper, we show the advantages of this structure compared to other conventional types. We also demonstrate a conformable LED matrix display in which LED chips are mounted at the center of each spiral in the array.","PeriodicalId":343912,"journal":{"name":"2016 International Conference on Electronics Packaging (ICEP)","volume":"158 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124711144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}