发布求助
文献互助 智能选刊 最新文献

NORCHIP 2012最新文献

筛选
英文 中文
A light-weight statically scheduled network-on-chip 一个轻量级的静态调度的片上网络
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403129
R. B. Sorensen, Martin Schoeberl, J. Sparsø
{"title":"A light-weight statically scheduled network-on-chip","authors":"R. B. Sorensen, Martin Schoeberl, J. Sparsø","doi":"10.1109/NORCHP.2012.6403129","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403129","url":null,"abstract":"This paper investigates how a light-weight, statically scheduled network-on-chip (NoC) for real-time systems can be designed and implemented. The NoC provides communication channels between all cores with equal bandwidth and latency. The design is FPGA-friendly and consumes a minimum of resources. We implemented a 64 core 16-bit multiprocessor connected with the proposed NoC in a low-cost FPGA.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124203503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Effect of process variations in CMOS chips for radar beamforming CMOS芯片工艺变化对雷达波束形成的影响
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403141
E. Bakken, T. Lande, S. Holm
{"title":"Effect of process variations in CMOS chips for radar beamforming","authors":"E. Bakken, T. Lande, S. Holm","doi":"10.1109/NORCHP.2012.6403141","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403141","url":null,"abstract":"The introduction of single chip CMOS radar transceivers offers the possibility of a low cost system for beamforming at close range. With the benefits of low weight, low power and low cost, single chip radars stand to possibly revolutionize a range of close range imaging applications such as land mine detection, through wall imaging and even medical imaging. There are, however some challenges that remain to be overcome in order to produce high quality radar images in real time. One of the main challenges lies in control over the CMOS process to produce a deterministic, uniform and reproducible delay line for sampling the received signal at a very high frequency. This paper gives an overview of possible error sources contributing to the lowering of quality of a radar image with particular focus on the effect of non-uniform sample delays caused by process variations. Finally, a method of direct calibration is presented that corrects some of the quality degradation.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123550098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Artificial neural network emulation on NOC based multi-core FPGA platform 基于NOC的多核FPGA平台的人工神经网络仿真
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403122
N. Mand, Francesco Robino, Johnny Öberg
{"title":"Artificial neural network emulation on NOC based multi-core FPGA platform","authors":"N. Mand, Francesco Robino, Johnny Öberg","doi":"10.1109/NORCHP.2012.6403122","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403122","url":null,"abstract":"With the emergence of Multi-Core platforms, brain emulation in the form of Artificial Neural Nets has been announced as one of the important key research area. However, due to large non-linear growth of inter-neuron connectivity, direct mapping of ANNs to silicon structures is very difficult due to communication bottleneck. As the system grows in size the conventional bottom up approach for building the system is no more feasible. New methodologies for generating the system from high level specification are mandatory to cope with design complexity. Recently, Multi-core systems using NOC architectures offer a promising solution to this issue and are also scalable. In addition, the growing logic size FPGAs makes them ideal platforms for experimenting on ANN emulation. In this paper we present how ANNs can be mapped to a NOC based multi-core FPGA platform using a scalable and expandable methodology for rapid prototyping of complex applications. The platform is quickly generated by the NOC System Generator tool by describing the system using an XML configuration file. Using this methodology, a small ANN is successfully mapped to the NoC based platform. Results of the design space exploration of multi layer perceptron on various NOC platforms are presented.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131390670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Challenges in IC design for hearing aids 助听器集成电路设计的挑战
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403133
I. Jørgensen
{"title":"Challenges in IC design for hearing aids","authors":"I. Jørgensen","doi":"10.1109/NORCHP.2012.6403133","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403133","url":null,"abstract":"Designing modern hearing aids is a formidable challenge. The size of hearing aids is constantly decreasing, making them virtually invisible today. Still, as in all other modern electronics, more and more features are added to these devices driven by the development in modern IC technology. The demands for performance and features at very low supply voltage and power consumption constantly prove a challenge to the physical design of hearing aids and not at least the design of the ICs for these. As a result of this all large hearing aid manufacturers use fully customized ASICs in their products to produce a competitive advantage. This presentation will give a brief insight into the hearing aid market and industry, a brief view of the historic development of hearing aids and an introduction to how a modern hearing is constructed showing the amplifier as the key component in the modern hearing aid. The size of the amplifier is critical for the size of the final hearing aid and a study of the size of these for different manufactures will be presented. Designing the ICs for hearing aids poses many challenges and is a constant compromise between size, power consumption and performance of the individual blocks and some of these will be highlighted in the presentation. Finally, the future perspective for ICs for hearing aids will be discussed.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"2021 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122211382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementation of FPGA based DSP module for CW Doppler radar: Preliminary results 基于FPGA的连续波多普勒雷达DSP模块的实现:初步结果
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403117
M. Terauds
{"title":"Implementation of FPGA based DSP module for CW Doppler radar: Preliminary results","authors":"M. Terauds","doi":"10.1109/NORCHP.2012.6403117","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403117","url":null,"abstract":"This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"69 12","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132802525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Heart and respiratory detection and simulations for tracking humans based on respiration by using pulse-based radar 心脏和呼吸的检测和模拟，利用脉冲雷达跟踪人类的呼吸
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403116
M. Baboli, O. Boric-Lubecke, V. Lubecke
{"title":"Heart and respiratory detection and simulations for tracking humans based on respiration by using pulse-based radar","authors":"M. Baboli, O. Boric-Lubecke, V. Lubecke","doi":"10.1109/NORCHP.2012.6403116","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403116","url":null,"abstract":"In this paper we present experimental findings of both the heart and respiratory rate of a static person using pulse based radar and we present a simulated system for tracking a moving person based on respiratory motion in an indoor environment. In the simulation the subject moves in one dimension and the system is able to track the subject by detecting their respiration. The presented system contains a transmitter, receiver, and channel model section, in addition to control section which controls the transceiver and processes the received data. The Gaussian monocycle is considered as transmitted pulse and the channel is modeled based on multipath delay and attenuation. The system first removes the person's movement using correlation between each received wave form. Then, the respiration rate of the target is calculated. Finally, the respiration rate is used to track the specific target in an indoor environment. The system is effective for accurate tracking of subjects walking in one direction, under 10 m/s. The algorithm for finding heart and respiratory rates is the same for both real and simulated environments.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"729 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114930028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design of power efficient FPGA based hardware accelerators for financial applications 基于FPGA的低功耗金融硬件加速器设计
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403096
Jonas Stenbaek Hegner, Joakim Sindholt, A. Nannarelli
{"title":"Design of power efficient FPGA based hardware accelerators for financial applications","authors":"Jonas Stenbaek Hegner, Joakim Sindholt, A. Nannarelli","doi":"10.1109/NORCHP.2012.6403096","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403096","url":null,"abstract":"Using Field Programmable Gate Arrays (FPGAs) to accelerate financial derivative calculations is becoming very common. In this work, we implement an FPGA-based specific processor for European option pricing using Monte Carlo simulations, and we compare its performance and power dissipation to the execution on a CPU. The experimental results show that impressive results, in terms of speed-up and energy savings, can be obtained by using FPGA-based accelerators at expenses of a longer development time.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116817282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Evaluation of SU8 photo polymer for microwave packaging applications 微波封装用SU8光聚合物的评价
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403146
Srinivasa Reddy Kuppireddi, S. Pamidighantam, V. Janardhana, O. Søråsen, J. S. Roy, R. G. Kulkarn
{"title":"Evaluation of SU8 photo polymer for microwave packaging applications","authors":"Srinivasa Reddy Kuppireddi, S. Pamidighantam, V. Janardhana, O. Søråsen, J. S. Roy, R. G. Kulkarn","doi":"10.1109/NORCHP.2012.6403146","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403146","url":null,"abstract":"Epoxy based photo polymer - SU8 is evaluated as microwave packaging material for packaging of Radio Frequency Micro Electro Mechanical Systems (RFMEMS). Standard and Slotted Coplanar Waveguide transmission lines are chosen as test vehicles. Transmission lines of lengths up to 10mm are formed on ST-Cut Quartz substrates. The fabricated transmission lines are subjected to wafer level packaging. The measured S-parameter data shows a significant difference prior to and after packaging. Further, the effects due to the packaging are modeled using lumped components and the measured data are validated with simulations in Advanced Design System. The measured and simulated data agree favorably with each other, for both before and after packaging.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125475911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 26 GHz UWB CMOS IR-UWB transmitter with on-chip balun 带有片上平衡器的26 GHz UWB CMOS IR-UWB发射机
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403100
K. G. Kjelgård, T. Lande
{"title":"A 26 GHz UWB CMOS IR-UWB transmitter with on-chip balun","authors":"K. G. Kjelgård, T. Lande","doi":"10.1109/NORCHP.2012.6403100","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403100","url":null,"abstract":"A 22-29 GHz UWB pulse transmitter in 90 nm bulk CMOS is presented. The transmitter is based on mixing of a continuous running LC-tank 26 GHz signal with a pseudo Gaussian base-band pulse. To maximize pulse peak to peak voltage a single balanced Gilbert cell mixer is loaded with a lumped balun. The measured results show a pulse with a -10 dB bandwidth of 5 GHz and a Vp-p of 219 mV within the 22-29 GHz band.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127859064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Embedded low power clock generator for sensor nodes 嵌入式低功耗时钟发生器传感器节点
NORCHIP 2012 Pub Date : 2012-11-01 DOI: 10.1109/NORCHP.2012.6403139
O. Schrape, F. Vater
{"title":"Embedded low power clock generator for sensor nodes","authors":"O. Schrape, F. Vater","doi":"10.1109/NORCHP.2012.6403139","DOIUrl":"https://doi.org/10.1109/NORCHP.2012.6403139","url":null,"abstract":"In this paper an embedded clock generation solution for low power sensor nodes is presented. A design example of a Digitally Controlled Oscillator (DCO) is given and compared to other approaches. The paper discusses the most common clock architectures for sensor nodes, their design challenges and potential integration issues. The proposed DCO is adjustable to 64 different frequencies in the range of 5.8 MHz to 13.9 MHz fed by a 2.5 V voltage supply. With an area utilization of 0.024mm2 in a 0.25 μm SiGe BiCMOS process, and an average current consumption of less than 106 μA, it fits best into power-area trade off for an internal several-MHz clock generator. It is designed as an IP-Core and can be placed directly into the digital core of a sensor node. Due to its robustness, the DCO can be connected to the noisy digital voltage supply. A test chip was sent to fabrication.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115263336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信