{"title":"基于FPGA的连续波多普勒雷达DSP模块的实现:初步结果","authors":"M. Terauds","doi":"10.1109/NORCHP.2012.6403117","DOIUrl":null,"url":null,"abstract":"This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.","PeriodicalId":332731,"journal":{"name":"NORCHIP 2012","volume":"69 12","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Implementation of FPGA based DSP module for CW Doppler radar: Preliminary results\",\"authors\":\"M. Terauds\",\"doi\":\"10.1109/NORCHP.2012.6403117\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.\",\"PeriodicalId\":332731,\"journal\":{\"name\":\"NORCHIP 2012\",\"volume\":\"69 12\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"NORCHIP 2012\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NORCHP.2012.6403117\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"NORCHIP 2012","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHP.2012.6403117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of FPGA based DSP module for CW Doppler radar: Preliminary results
This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.