基于FPGA的连续波多普勒雷达DSP模块的实现:初步结果

M. Terauds
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引用次数: 4

摘要

本文介绍了一种用于24 GHz连续波多普勒雷达的新型数字信号处理(DSP)模块的现场可编程门阵列(FPGA)的开发和实现。该模块采用了著名的过零算法、相对简单的信号滤波、迭代搜索法和散射中心模型。该模块用于检测车辆;它估计它的速度,车道和形状。给出了双车道情况下车道和车辆长度估计的初步结果。生成了VHDL代码,并估计了DSP基本阶段所需的FGPA设备资源。基于Simulink的HDL编码器实现了新算法的VDHL代码生成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of FPGA based DSP module for CW Doppler radar: Preliminary results
This paper presents development and implementation of the Field-Programmable Gate Arrays (FPGA) of a novel Digital Signal Processing (DSP) module for the 24 GHz continuous wave (CW) Doppler radar. The module utilizes the well-known zero-crossing algorithm, relative simple signal filtering, iterative search method and the scattering centers model. The module is constructed to detect vehicles; it estimates its velocity, lane, and shape. Preliminary results of the lane and vehicle length estimation in case of two lanes are provided. VHDL code has been generated and necessary FGPA device resources for basic stages of DSP are estimated. Implementable VDHL code generation of novel algorithm is based on Simulink HDL coder.
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