2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition最新文献_第4页

Investigations of temperature resistance of memory BGA components during multi-reflow processes for Circular Economy applications 循环经济应用中多回流过程中记忆体BGA元件的耐温性研究

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346853

J. Sitek, M. Kościelski, Piotr Dawidowicz, Piotr Ciszewski, Mariia Khramova, Duc Nguyen Quang, Sergio Martinez

{"title":"Investigations of temperature resistance of memory BGA components during multi-reflow processes for Circular Economy applications","authors":"J. Sitek, M. Kościelski, Piotr Dawidowicz, Piotr Ciszewski, Mariia Khramova, Duc Nguyen Quang, Sergio Martinez","doi":"10.23919/EMPC.2017.8346853","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346853","url":null,"abstract":"This article presents the results of research aimed to evaluate temperature resistance of memory BGA components during different multi-reflow processes which are needed for desoldering and remanufacturing processes of BGA components in Circular Economy applications. Special test PCBA has been designed to verify temperature resistance of active components such as memories and controllers. From 1 to 12 cycles of thermal exposures (reflow processes) have been applied to conduct thorough assessment of BGA components. The functionality of components after each thermal process has been checked right away. Additional verification after desoldering and remanufacturing of components has been performed by “sustainablySMART” project partner — Blancco Technology Group (herein after referred as to “Blancco”). The memory test results show that active components are much more temperature resistant than what is stated in the datasheets provided by the manufacturer. The most frequently observed defects were related to the damage of PCB's pads not to the structure of active components.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124548896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Reliability of embedded wafer level ball grid arrays in automotive applications 嵌入式晶圆级球栅阵列在汽车应用中的可靠性

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346854

Michael Novak, W. Grübl, B. Schuch, Peter Ossimitz

{"title":"Reliability of embedded wafer level ball grid arrays in automotive applications","authors":"Michael Novak, W. Grübl, B. Schuch, Peter Ossimitz","doi":"10.23919/EMPC.2017.8346854","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346854","url":null,"abstract":"A general trend in automotive electronics is the development of customized products with the focus on system integration, increased reliability, and lower costs. For Continental's transmission control units (TCUs), this means a minimum of available space with extended functionalities and high operating temperatures. As a result, small package solutions with a sufficient number of interconnects and excellent thermal, electrical, and mechanical performance and reliability are needed. The family of Wafer Level Packages (WLP) was developed to provide very small packages down to the outline of the chip size. The embedded Wafer-Level Ball Grid Array (eWLB) is a WLP with a fan out area beside the chip edge, which enables a greater number of external contacts. These packages were successfully introduced and widely established in consumer electronics and mobile applications. The high volume production has been globally established for years and makes the eWLB package an interesting candidate for future automotive applications with minimized space requirements. A key issue in automotive applications is the 2nd-level reliability due to high numbers of temperature cycling at higher temperature ranges. In this paper, the board level reliability for eWLB packages is investigated. This includes the influence of selected underfill materials on the solder joint fatigue of lead-free solder during high temperature storage (150 °C) and during temperature cycles between −40 °C and 150 °C. An integrated daisy chain chip allows electrical in-situ measurements for the detailed statistical failure analysis.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127699842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Parameters estimation of SPICE models for silicon carbide devices 碳化硅器件SPICE模型的参数估计

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346918

D. Bisewski

引用次数: 4

Low temperature co-fired ceramics; physical and electrical properties as a function of firing temperature 低温共烧陶瓷;烧成温度的物理和电气特性

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346899

J. Walker, B. Adrian, J. Henry, E. Graddy

引用次数: 2

Additive waveguide manufacturing for optical bus couplers by aerosol jet printing using conditioned flexible substrates 利用条件柔性基板的气溶胶喷射打印制造光总线耦合器的附加波导

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346857

L. Lorenz, K. Nieweglowski, K. Wolter, K. Bock, G. Hoffmann, L. Overmeyer, T. Reitberger, J. Franke

引用次数: 0

Pads and microscale vias with aerosol jet printing technique 气雾喷射印刷技术的垫和微孔

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346869

J. Krzemiński, M. Jakubowska, Akhil Kanthamneni, David Wagner, M. Detert, B. Schmidt

{"title":"Pads and microscale vias with aerosol jet printing technique","authors":"J. Krzemiński, M. Jakubowska, Akhil Kanthamneni, David Wagner, M. Detert, B. Schmidt","doi":"10.23919/EMPC.2017.8346869","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346869","url":null,"abstract":"Flexible printed electronic circuits find application in many fields including electrical engineering, bioengineering or textronic. Commonly used screen printed circuits, despite their low cost, have simply too wide paths (typical line width is about 100 μm) and require flat substrate. Due to the technical limitations more accurate and sophisticated technique was developed — aerosol jet printing. The possibility to print 3D structures with the line about 0,5 μm thick and 10 μm wide make it even comparable to the expensive, many-staged photolithography. Nevertheless still some important steps are missing to print completely unified microscale circuit with aerosol jet printing technique. One is microvia formation, which is the primary condition to obtain highly dense circuit. The other is external electrical elements assemblage to increase the functionality and application ability. The fulfilment of both gaps will allow to print microscale flexible circuits. Our work presents the essential research of microvia and pad formation made with aerosol jet printing technique. We have tested various pad shapes and sizes suitable for industrial smd elements for lead-free soldering and grade them in the terms of connection strength and resistance. We have located and investigated the break point to define the joint weak point. The SEM images provide the information about the microstructure appearance. The via materialization thickness and its transition resistance shows the connection electrical properties.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"312 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115625814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Influence of various micro channels integrated in LTCC multilayer module on the thermal resistance LTCC多层模块中不同微通道集成对热阻的影响

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346880

Tomas Girasek, A. Pietrikova, T. Welker, Jens Müller

{"title":"Influence of various micro channels integrated in LTCC multilayer module on the thermal resistance","authors":"Tomas Girasek, A. Pietrikova, T. Welker, Jens Müller","doi":"10.23919/EMPC.2017.8346880","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346880","url":null,"abstract":"This paper presents novel application of using micro channels integrated in LTCC (Low Temperature Co-fired Ceramics) structure as new solution for cooling in power electronics. The aim of this paper is detailed investigation of the thermal resistance, flow analysis and distribution of coolant inside LTCC substrates with internal micro channels. Three different LTCC multilayer structures with integrated micro channel and thermal vias were designed, simulated, fabricated and measured. It was applied various micro channel widths and various quantities of thermal vias under the power chip for improving cooling affect. The impact of the volume flow of liquid coolant, structures of multilayer substrate and thermal vias on thermal resistance of substrate was simulated by using the simulation software Mentor Graphic FloEFD™. The fluidic channel was integrated in the third layer from the top of 6 layers substrate. Thermal vias were embedded inside substrate and channel excluding the top dielectric layer. This cooling concept improves homogeneity and effectivity of heat transfer between the power chips and the coolant. The coolant is pumped through channel for cooling down the 2 tested chips. Principle of thermal resistance measuring was on investigation of the impact of the first chips' thermal load on the second chip. The heat transfer is characterized by the decrease of maximum working temperature, thermal resistance of substrate, temperature distribution, fluid pressure and flow velocity. The main advantage of presented cooling concept is effective and homogenous cooling of critical components.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"9 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114104280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Non-linear compact thermal model of IGBTs igbt的非线性紧凑热模型

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346910

P. Górecki, K. Górecki

引用次数: 3

Signal analyses of airbag sensor by side impact 侧面碰撞下安全气囊传感器信号分析

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346842

Yeong-Kook Kim, Sojin Shin

{"title":"Signal analyses of airbag sensor by side impact","authors":"Yeong-Kook Kim, Sojin Shin","doi":"10.23919/EMPC.2017.8346842","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346842","url":null,"abstract":"Due to the nature of MEMS sensor, the signal characteristics of the impact sensor are strongly influenced by the module packaging type. In this paper, performances of MEMS airbag sensors were analyzed under side impact using two different module packaging types. The first type was a new sensor packaging on the flexible circuit board was introduced to attach directly on the frame surface using adhesive. The second sensor type was a conventional packaging structure, and composed of the accelerometer MEMS sensor mounted on a printed circuit board, which is assembled inside a plastic housing. And the entire module is mechanically installed by bolts on the automobile frame. For the signal characterizations, impact tests were performed on the center pillar, a.k.a. b-pillar, where the sensors were installed for the pendulum test. It was found that the housing module had great effects on the signal generation due to the vibration interaction with the automobileframe. Numerical analyses were also carried out for the detail investigation. The results indicated that the system of the airbag sensor packaging requires the comprehensive engineering consideration.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122115320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

High efficient mid power modules by next generation chip embedding technology 采用新一代芯片嵌入技术的高效中功率模块

2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition Pub Date : 2017-09-01 DOI: 10.23919/EMPC.2017.8346864

K. Essig, J. Yannou, C. Chiu, J. Kuo, Phidia Chen

{"title":"High efficient mid power modules by next generation chip embedding technology","authors":"K. Essig, J. Yannou, C. Chiu, J. Kuo, Phidia Chen","doi":"10.23919/EMPC.2017.8346864","DOIUrl":"https://doi.org/10.23919/EMPC.2017.8346864","url":null,"abstract":"Embedding active dies into the substrate is fulfilling integration requirements for modern communication devices. Freeing up real estate on the substrate is a big advantage, but embedding was shown to have further beneficial effects on electrical performance and thermal dissipation that deliver more benefit for embedding, especially for Mid Power Modules from a few hundred watts up to 5kW. Power modules tend to operate at higher frequencies (MHz range) and aim to apply smaller capacitors and inductors. This approach reduces the overall PCB size and weight from system point of view. These beneficial effects were observed especially for embedded Power Dies that were already mounted in a lead frame cavity when embedding. In this paper we shall report the development of embedded technologies for Power Modules mounted in a lead frame cavity and compare electrical performance, thermal dissipation and reliability results with conventional PQFN packages. We shall also report electrical performance in various operation frequency ranges from few KHz to MHz to address the benefit on high switching frequency power module for Si, SiC or GaN application. We will also address the EMI effect can be eliminated by using chip embedded technology instead of wire bonding connection from driver to gate pad of power MOSFET chip. We will conclude, that the challenges of electrical performance and thermal dissipation required for today's power modules can successfully be overcome by next generation power modules that are based on lead frame chip embedding.","PeriodicalId":329807,"journal":{"name":"2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124715571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0