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2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)最新文献

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Performance Comparison between PI based Control and Model Predictive Control of Voltage Source Inverter under Load Variations 负载变化下基于PI控制与模型预测控制的电压源逆变器性能比较
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032916
Sujoy Bhowmik, P. Gayen, A. Mitra
{"title":"Performance Comparison between PI based Control and Model Predictive Control of Voltage Source Inverter under Load Variations","authors":"Sujoy Bhowmik, P. Gayen, A. Mitra","doi":"10.1109/EDKCON56221.2022.10032916","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032916","url":null,"abstract":"Now-a-days, advancement of control logic for DC-AC converter, i.e., an inverter become important in stand-alone applications. This converter is essential for multi-purposes, such as, to convert outputs of different renewable sources, to provide variable frequency and/or voltage for industrial motor-drive system, to provide back-up power supply etc. In the applications, proper selection of controller is very much essential for achieving improved dynamic performance of inverter. In this regard, different control logics for three-phase two level voltage source inverter have been examined. Here, comparative studies between conventional closed loop current control using proportional-integral (PI) regulator and model predictive current control method have been done under variable loading conditions on inverter. This is appearing from observations of various studies that dynamic behaviours of load current have been enhanced in case of model predictive control (MPC) than that of PI controller based logic. Also, harmonic distortion in load current is reduced under MPC logic.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129942357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance Assessment of a Dielectrically Modulated SiGe-Pocket DG TFET-based Biosensor 基于介质调制SiGe-Pocket DG tfet的生物传感器性能评估
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032955
Namrata Shaw, B. Mukhopadhyay
{"title":"Performance Assessment of a Dielectrically Modulated SiGe-Pocket DG TFET-based Biosensor","authors":"Namrata Shaw, B. Mukhopadhyay","doi":"10.1109/EDKCON56221.2022.10032955","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032955","url":null,"abstract":"In this paper, a gate-drain underlap and stack oxide double gate Tunnel Field Effect Transistor (DG TFET) with an n-type SiGe pocket at the source-channel interface device-based biosensor is proposed. The variation in the dielectric constant corresponding to the change in the type of biomolecule is reflected in the changes observed in the device’s transfer characteristics. The label-free sensing of biomolecules is performed by the device and a high sensitivity is obtained. The gate-drain underlap region consists of a spacer oxide which in turn reduces the ambipolarity of the device. Extensive sensitivity analysis of the biosensor device is done in terms of the threshold voltage, sub-threshold swing and drain current for different biomolecules.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133806866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Implementation of Area Efficient Approximate MAC Unit for Deep Neural Network based Architectures and Applications 基于深度神经网络架构与应用的面积高效近似MAC单元的设计与实现
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032878
Lahari P. L, S. Yellampalli, Renuka Chowdary Bheemana, R. Vaddi
{"title":"Design and Implementation of Area Efficient Approximate MAC Unit for Deep Neural Network based Architectures and Applications","authors":"Lahari P. L, S. Yellampalli, Renuka Chowdary Bheemana, R. Vaddi","doi":"10.1109/EDKCON56221.2022.10032878","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032878","url":null,"abstract":"The Multiply Accumulate Unit, which is utilized to boost the processor's overall speed, is the subject of this essay. Applications for digital signal processing that use multiply-accumulate units include convolution, digital filters, image, video, and audio, among others. Accuracy is not given priority when image and video processing applications are taken into account, hence an approximate multiply-accumulate unit is built. This approximate multiply-accumulate unit, compared to a floating point multiply-accumulate unit simulated in Xilinx ISE 14.5, and various parameters like area, delay, and speed are compared between floating and approximate MAC consisting of an approximate multiplier efficient, an approximate adder, and an approximate accumulator. The approximate multiply-accumulate unit uses less space (66% less) and has a 75% shorter delay, all of which contribute to its high speed.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"36 2-3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126912251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of Nitride Stress on Linearity performance of AlGaN/GaN HEMT 氮化应力对AlGaN/GaN HEMT线性性能的影响
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032924
Devika Jena, Sanghamitra Das, E. Mohapatra, Tara Prasanna Dash
{"title":"Effect of Nitride Stress on Linearity performance of AlGaN/GaN HEMT","authors":"Devika Jena, Sanghamitra Das, E. Mohapatra, Tara Prasanna Dash","doi":"10.1109/EDKCON56221.2022.10032924","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032924","url":null,"abstract":"Strain engineering has proved to be useful for enhancing the performance of AlGaN/GaN HEMT devices. The device transfer characteristics are significantly affected by proper optimization of the stress in the nitride passivation layer. Nonlinearity effects are the major concern for AlGaN/GaN HEMT devices at high frequencies which can vary due to the intrinsic stress in the nitride passivation layer. In this paper for the first time, we have reported the effect of stress on the linearity of the device. With L<inf>G</inf> =200nm the linearity parameter like g<inf>m1</inf>, g<inf>m2</inf>, g<inf>m3</inf>, VIP<inf>2</inf>, VIP<inf>3</inf> and IIP<inf>3</inf> are compared for no stress, comparative stress and tensile stress device.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130215160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Study of the influence of parameters to explore the Properties of Graphene Nanoribbon Field Effect Transistors 研究参数对石墨烯纳米带场效应晶体管性能的影响
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032928
Sriyanka Behera, S. R. Pattanaik, G. Dash
{"title":"Study of the influence of parameters to explore the Properties of Graphene Nanoribbon Field Effect Transistors","authors":"Sriyanka Behera, S. R. Pattanaik, G. Dash","doi":"10.1109/EDKCON56221.2022.10032928","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032928","url":null,"abstract":"Graphene based devices are impelling the innovations for the final implementation of flexible electronic devices within new perspectives of the future technological developments. Specially, GNRFET has placed in a superior position due to the existence of finite bandgap and the ability to tune the same by a simple way (of varying the width). Therefore, we have explored the properties of GNRFET by using some analytic approach with a view to assess its efficacy as a Field Effect Transistor (FET). Reduction of a 2-dimensional (2D) Poisson equation to a one-dimensional (1D) form in an effective manner is the main of focus of this method. The approach was used to study the influence of geometrical and electrical parameters on I-V characteristics of the GNRFET. The results of this work pave the way for the possibilities for device engineers to characterize GNRFETs based on the requirements of a specific device application. The resulting convergence of the inflection point is an interesting feature of our study.The existence of a critical voltage, beyond which the current rises in its value with temperature, is an pre-eminent feature of our GNRFET model.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130292010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improvement of Transport Mobility in Asymmetric V-shaped Double Quantum Well Structure 非对称v型双量子阱结构中输运迁移率的改进
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032965
D. Jena, Tara Prasanna Dash, N. Sahoo, A. Sahu, A. K. Panda, T. Sahu
{"title":"Improvement of Transport Mobility in Asymmetric V-shaped Double Quantum Well Structure","authors":"D. Jena, Tara Prasanna Dash, N. Sahoo, A. Sahu, A. K. Panda, T. Sahu","doi":"10.1109/EDKCON56221.2022.10032965","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032965","url":null,"abstract":"The improvement of transport electron mobility μ is theoretically reported through a change in well width w in an asymmetric V-shaped double quantum well (AVDQW) structure. The side barriers are doped with different doping concentrations i.e., Nd1 (vary) and Nd2 (fixed) towards the substrate and surface respectively which produces asymmetry in the structure. An increase in w enhances μ. The magnitude of μ is decided by the alloy disorder scattering but the trend in the variation of μ as a function of Nd1 is mainly decided by the impurity scattering.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131036048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reversible Vigenere Cryptographic Cipher in Quantum-Dot Cellular Automata 量子点元胞自动机中的可逆维涅尔密码
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032968
Arpita Kundu, J. Das, D. De, B. Debnath
{"title":"Reversible Vigenere Cryptographic Cipher in Quantum-Dot Cellular Automata","authors":"Arpita Kundu, J. Das, D. De, B. Debnath","doi":"10.1109/EDKCON56221.2022.10032968","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032968","url":null,"abstract":"Using cryptography to protect and securely transmit data is crucial in today's environment. Data theft is inescapable; we must encrypt and decrypt messages to prevent data abuse and ensure that only the intended recipient can access the information. One such encoding method is the Vigenere Cipher algorithm, where we employ reversible logic to implement this approach in this paper. In the realm of VLSI, Quantum Dot Cellular Automata (QCA) is proving to be a better solution to CMOS and preferable for creating reversible logic. The Vigenere Cipher approach improves data security when used with reversible logic. This encryption and decryption circuit are designed using Peres and DG gates in QCA. It comprises 38 and 40 cells and includes a single layer. It has been demonstrated that the circuit reduces cell count and area. In this scenario, the QCADesigner tool is used for design and verification.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122658782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design and Performance Analysis of DC-DC Sepic Converter for Specific Input Range 特定输入范围DC-DC专用变换器的设计与性能分析
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032921
Sujoy Bhowmik, A. Mitra, Sudhangshu Sarkar, S. Mukherjee, Kamalika Banerjee, Pallav Dutta
{"title":"Design and Performance Analysis of DC-DC Sepic Converter for Specific Input Range","authors":"Sujoy Bhowmik, A. Mitra, Sudhangshu Sarkar, S. Mukherjee, Kamalika Banerjee, Pallav Dutta","doi":"10.1109/EDKCON56221.2022.10032921","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032921","url":null,"abstract":"In distributed generation system, proper utilization of DC power and its integration to grid have become a major role to mitigate the power demand. Conversion of DC power is very much essential such as AC-DC-DC and/or AC-DC-AC as per requirement of the utility. Also, DC voltage level is to be maintained at a desired value. In this context, Research on different types of DC-DC step-up/down converters have already been carried out previously. This proposed work focuses on a DC-DC Sepic Converter with specific range of input voltage. Based on this, the estimation of parameters is being studied accordingly. For constant output voltage, performance analysis has been investigated both under open-loop and closed-loop configuration depending on calculated duty ratio. A mathematical modelling has been established to find out the stability of the converter with estimated parameters both for minimum and maximum input voltage. It is observed that the parameters computed for minimum input voltage exhibits better response than maximum input voltage. Moreover, closed-loop design with the same parameters ensures better response than the open-loop responses.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"525 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123358139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Exploring the Influence of Channel and Contact Resistance Variability in Graphene Field Effect Transistor 探讨石墨烯场效应晶体管中沟道和接触电阻变异性的影响
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032963
Sriyanka Behera, S. R. Pattanaik, B. Behera, G. Dash
{"title":"Exploring the Influence of Channel and Contact Resistance Variability in Graphene Field Effect Transistor","authors":"Sriyanka Behera, S. R. Pattanaik, B. Behera, G. Dash","doi":"10.1109/EDKCON56221.2022.10032963","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032963","url":null,"abstract":"The quality of contacts between 2D material and metal significantly affects the performance of devices based on 2D material. Therefore, we present an article that investigates the contact and channel resistance of graphene field-effect transistors. It is interesting to observe that channel and contact resistance efficiently affects the total resistance of graphene-based devices. In addition to the total resistance of the device, the channel and contact resistance are effectively influenced by applied bias. The source-drain resistance, the contact resistance inherently depends on the resistance of the graphene channel. We present a useful model for determining the channel resistance of a device. Our model explains, how the Gaussian peak values are same for the same contact resistances when RS <1000, which is a very characteristic study result. In addition, our model shows a multiplicity effect at high source resistance and low top gate voltage.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114552067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel Extended Back-Gate Negative Capacitance TFET for Improved Device Performance 一种改进器件性能的新型扩展后栅负电容TFET
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) Pub Date : 2022-11-26 DOI: 10.1109/EDKCON56221.2022.10032855
Anil Kumar Pathakamuri, C. Pandey
{"title":"A Novel Extended Back-Gate Negative Capacitance TFET for Improved Device Performance","authors":"Anil Kumar Pathakamuri, C. Pandey","doi":"10.1109/EDKCON56221.2022.10032855","DOIUrl":"https://doi.org/10.1109/EDKCON56221.2022.10032855","url":null,"abstract":"We propose a novel Extended Back-Gate Overlap-Drain Negative Capacitance DGTFET (EBGODDG-NCTFET) with improved DC performances. Even though EBGODDG-NCTFET shows a great improvement in ON-state current (ION) and subthreshold swing (SS) owing to the introduction of the Ferroelectric (FE) layer, a detailed comparative analysis has been carried out to study the effect of the Extended Back-Gate Overlap-Drain on ambipolar conduction, OFF-state current and turn-on voltage of DG-NCTFET. The proposed EBGODDG-NCTFET in which only the back gate overlaps the drain has been found suppressing the ambipolarity up to a great extent. This structure of DG-NCTFET may resolve the trade-off between ambipolarity and parasitic capacitance by using back gate–drain overlap only. Due to a strong vertical electrical field causing greater depletion inside drain region, width of drain/channel tunneling barrier attains a larger value in EBGODDG-NCTFET, thus preventing charge carriers from tunneling during ambipolar state.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124474652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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