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1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers最新文献

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GaAs switched geometry oscillator for X and Ku bands 用于X和Ku波段的砷化镓开关几何振荡器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156336
B. Scott
{"title":"GaAs switched geometry oscillator for X and Ku bands","authors":"B. Scott","doi":"10.1109/ISSCC.1982.1156336","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156336","url":null,"abstract":"A single oscillator circuit using an FET pair with RF coupled, dc isolated gates, which is capable of operating at two widely separated but selectable frequencies, will be presented. Unswitched, the oscillations are at 200GHz, and when the second FET is pinched off, the output frequency changes to 12.5GHz.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131384100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 64b floating point processor 一个64b浮点处理器
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156327
F. Ware
{"title":"A 64b floating point processor","authors":"F. Ware","doi":"10.1109/ISSCC.1982.1156327","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156327","url":null,"abstract":"A floating point chip set capable of one-million scalar operations per second will be reported. The set consists of add/subtract, multiply and divide chips.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"12 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132069419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A monolithic voice recorder 单片录音机
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156312
T. Takamizawa, Y. Hashimoto, M. Arakawa, K. Katco, Yasuo Tani, T. Satoh, N. Kitagawa, J. Bryant
{"title":"A monolithic voice recorder","authors":"T. Takamizawa, Y. Hashimoto, M. Arakawa, K. Katco, Yasuo Tani, T. Satoh, N. Kitagawa, J. Bryant","doi":"10.1109/ISSCC.1982.1156312","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156312","url":null,"abstract":"A monolithic voice recorder performing realtime recording and reproduction of human voice will be described. Device contains a 10Kb dynamic shift register array and a continuously-variable-slope-delta-modulator.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124344829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SOS MOSFETs for monolithic microwave ICs 用于单片微波集成电路的SOS mosfet
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156332
S. Yu, J. Eshbach, Ying Hwang, R. Naster
{"title":"SOS MOSFETs for monolithic microwave ICs","authors":"S. Yu, J. Eshbach, Ying Hwang, R. Naster","doi":"10.1109/ISSCC.1982.1156332","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156332","url":null,"abstract":"Large gate-width SOS MESFETs, operated at 3GHz, with output power densities of 175mW/mm,ηdrain = 51% and ηpower-added = 31%, will be described. Device impedances were measured versus power level.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129437929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A systolic processing element for speech recognition 语音识别的收缩处理元件
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156321
N. Weste, D. Burr, B. Ackland
{"title":"A systolic processing element for speech recognition","authors":"N. Weste, D. Burr, B. Ackland","doi":"10.1109/ISSCC.1982.1156321","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156321","url":null,"abstract":"An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129464059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Status and future trends in computer design aids 计算机设计辅助工具的现状和未来趋势
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156386
J. Solomon
{"title":"Status and future trends in computer design aids","authors":"J. Solomon","doi":"10.1109/ISSCC.1982.1156386","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156386","url":null,"abstract":"The problem of VLSI layout complexity and anticipated solutions involving the use of computer aids will be addressed. In particular, symbolic layout and procedural design techniques will be discussed from the perspective of the CAD community, as well as the Potential impact on the design community.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130015587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 6,000-gate CMOS gate array 一个6000门CMOS门阵列
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156281
T. Itoh, M. Takechi, M. Fujita, K. Ikuzaki, A. Masaki, M. Asano, S. Murata, S. Horiguchi, H. Yoshimura
{"title":"A 6,000-gate CMOS gate array","authors":"T. Itoh, M. Takechi, M. Fujita, K. Ikuzaki, A. Masaki, M. Asano, S. Murata, S. Horiguchi, H. Yoshimura","doi":"10.1109/ISSCC.1982.1156281","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156281","url":null,"abstract":"This paper will describe a gate array with a loaded propagation delay of 2ns per gate. The device employs 2μm rules, double metal layers, silicon gate technology and bent-gate patterns for a minimum chip area.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130262855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Technology for digital subscriber loops and local data busses 数字用户环路和本地数据总线技术
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156380
H. Mussman, D. Sealer
{"title":"Technology for digital subscriber loops and local data busses","authors":"H. Mussman, D. Sealer","doi":"10.1109/ISSCC.1982.1156380","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156380","url":null,"abstract":"Loops and busses are the media competing to carry data and voice around the 'office of the future', connecting terminals to processors and both to outside networks. Furthermore, digital loops may be required to provide new residential services . . . Interfacing with either media is complicated by data rates as high as 10Mb and the need for formatting and error checking in realtime. All functions must be realized with a high reliability at a low cost.... Panelists will define the required functions and evaluate the technologies that are competing for their realization.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"XXV 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130403405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 64K bipolar PROM 一个64K双极PROM
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156406
R. Fisher
{"title":"A 64K bipolar PROM","authors":"R. Fisher","doi":"10.1109/ISSCC.1982.1156406","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156406","url":null,"abstract":"A 65,536b bipolar PROM, using a lateral NiCr fuse link on a junction isolated process and 3μ lithography, will be discussed. Consumption is 190mA and typical access time is 45ns.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126624142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A HI-CMOSII 8K × 8b static RAM A - 8k ×静态内存
1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1982.1156345
O. Minato, T. Masuhara, T. Sasaki, Y. Sakai, T. Hayashida, K. Nagasawa, K. Nishimura, T. Yasui, T. Miyauchi
{"title":"A HI-CMOSII 8K × 8b static RAM","authors":"O. Minato, T. Masuhara, T. Sasaki, Y. Sakai, T. Hayashida, K. Nagasawa, K. Nishimura, T. Yasui, T. Miyauchi","doi":"10.1109/ISSCC.1982.1156345","DOIUrl":"https://doi.org/10.1109/ISSCC.1982.1156345","url":null,"abstract":"A fully-static 8K×8b RAM using HICMOSII technology with a typical address access time of 65ns and power dissipation of 200mW will be discussed. To improve manufacturing yield a laser redundancy technique utilizing a N+ -i-N+ polysilicon structure was employed.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121075670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
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