{"title":"A systolic processing element for speech recognition","authors":"N. Weste, D. Burr, B. Ackland","doi":"10.1109/ISSCC.1982.1156321","DOIUrl":null,"url":null,"abstract":"An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.","PeriodicalId":291836,"journal":{"name":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1982.1156321","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
An integrated 16b CMOS processor designed for systolic array processing, with programmable processors, capable of performing the pattern matching required for speech recognition of up to 25,000 words per second will be described.