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Proceedings of 4th International Conference on Solid-State and IC Technology最新文献

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High-quality a-SiGe:H produced by nanometer deposition and hydrogen plasma annealing 采用纳米沉积和氢等离子体退火工艺生产高品质的a-SiGe:H
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.500191
Jun Xu, S. Miyazaki, M. Hirose, Kunji Chen, D. Feng
{"title":"High-quality a-SiGe:H produced by nanometer deposition and hydrogen plasma annealing","authors":"Jun Xu, S. Miyazaki, M. Hirose, Kunji Chen, D. Feng","doi":"10.1109/ICSICT.1995.500191","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500191","url":null,"abstract":"High-quality narrow bandgap (<1.5 eV) a-SiGe:H films have been fabricated by alternately repeating the deposition of a few nanometer thick a-SiGe:H layer and hydrogen plasma annealing. With increasing hydrogen plasma annealing time, both the hydrogen content and optical bandgap are decreased and photosensitivity has been improved to >10/sup -5/ S/cm and >10/sup 4/, respectively. It is shown that the metastable states are also reduced by hydrogen plasma annealing.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116990476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LSP speech synthesis ASIC architecture LSP语音合成ASIC架构
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.503532
Xingjun Wu, Yi-He Sun
{"title":"LSP speech synthesis ASIC architecture","authors":"Xingjun Wu, Yi-He Sun","doi":"10.1109/ICSICT.1995.503532","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503532","url":null,"abstract":"A speech synthesis ASIC based on the line spectrum pair (LSP) scheme has been designed. In this ASIC, we encoded the LSP parameters with 4-bit Differential Quantization, and designed a two's complement 12-bit fixed-point serial pipeline arithmetic operations with rounding to perform the operations of the LSP speech synthesis digital filter. Finally, we verified our design for Chinese single-syllable pronunciations and continuous speech using FPGA, and obtained good synthetic speech at low bit rate (about 2.2 kbps).","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115427821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
MOSFET drain engineering for low-power applications 低功耗应用的MOSFET漏极工程
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.500154
F. Fujishiro, L. Ding, E. Nowak, Y. Loh
{"title":"MOSFET drain engineering for low-power applications","authors":"F. Fujishiro, L. Ding, E. Nowak, Y. Loh","doi":"10.1109/ICSICT.1995.500154","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500154","url":null,"abstract":"The lightly doped drain (LDD) transistor structure has been used for several sub-micron process generations to improve hot carrier immunity for 5-volt applications. The principal challenge for LDD design is to optimize current-drive capability, thus improving circuit performance, while maintaining acceptable hot-carrier lifetime. The challenge for deep sub-micron devices remains the same, but some of the design constraints have changed. Reduction of the supply voltage V/sub dd/ inherently improves the hot-carrier lifetime, thus potentially allowing greater latitude in MOS device design. In this paper, the current-drive capability of MOSFETs with various drain structures is studied for 3.3-volt applications.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"584 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115673121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A low power OTA with adaptive biasing and common-mode compensation 具有自适应偏置和共模补偿的低功耗OTA
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.499779
Zhiliang Hong, Yan Wang
{"title":"A low power OTA with adaptive biasing and common-mode compensation","authors":"Zhiliang Hong, Yan Wang","doi":"10.1109/ICSICT.1995.499779","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499779","url":null,"abstract":"This paper will present a low power OTA with an adaptive biasing and common-mode compensation. The OTA has an open-loop gain of 60 dB and unit bandwidth of 20 MHz with capacitive load of 6pF. Its power consumption is 3.8 mW and chip area is 0.01 mm/sup 2/. The chip was made in 1.2 /spl mu/m CMOS technology in AMS.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114325357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Isolating analog circuits from digital interferences 隔离模拟电路与数字干扰
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.503381
P. Basedau, Qiuting Huang, O. Paul, H. Baltes
{"title":"Isolating analog circuits from digital interferences","authors":"P. Basedau, Qiuting Huang, O. Paul, H. Baltes","doi":"10.1109/ICSICT.1995.503381","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503381","url":null,"abstract":"Recent advances in analog integrated circuit techniques and continued improvement in VLSI technology are enabling more and more mixed-signal analog digital integrated circuits to be implemented on the same chip. One of the important topics in mixed signal circuit design is the coupling of digital switching noise onto sensitive nodes in the analog circuits. In this paper we consider isolating analog circuits using a post processing method. Using an inexpensive mask, a trench can be etched using potassium hydroxide, KOH, from the backside of the wafer all the way to the under-surface of the field oxide. To evaluate the practical aspects of the basic idea, we have implemented some test structures consisting of analog sensing transistors surrounded by conventional guard ring, and large digital inverters a few hundred microns away.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114405837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A modified Hamming neural network 一种改进的汉明神经网络
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.503393
Wei Lu, Zhijian Li, B. Shi
{"title":"A modified Hamming neural network","authors":"Wei Lu, Zhijian Li, B. Shi","doi":"10.1109/ICSICT.1995.503393","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503393","url":null,"abstract":"A modified Hamming neural network and its integrated circuit model are presented. The network consists of a template matching circuit and a \"Winner-Take-All\" (WTA) circuit. Simulation shows that it has high precision, high speed and low power dissipation. It can be used to recognize handwritten digits.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115786414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Film-induced stress in substrate/film structure 衬底/薄膜结构中的薄膜诱导应力
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.500084
Hancheng Liang, Shounan Zhao, G. Qin, K. K. Chin
{"title":"Film-induced stress in substrate/film structure","authors":"Hancheng Liang, Shounan Zhao, G. Qin, K. K. Chin","doi":"10.1109/ICSICT.1995.500084","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500084","url":null,"abstract":"Most all microelectronic devices have the basic material structure of a semiconductor substrate with thin films on it. The thin film layer and its discontinuity will give rise to stress fields in both the semiconductor substrate and the thin film. We investigate the stress in such film/substrate structures by using the photoelastic method. Compared with other stress measurement technologies, the photoelastic method is a distinctive method. It can offer the real-time qualitative observation as well as the quantitative determination of stress distribution in a sample. Under a polarized light field, birefringence patterns are obtained in a semiconductor substrate when it is stressed. By analyzing the polarization information added by the stressed crystal region, the stress distribution in the substrate may be extracted. According to the principle of static force balance, the stress introduced into the thin film can be estimated by investigating the stress integral of the substrate.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114106090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new method for high aspect X-ray mask fabrication 一种制备高纵横面x射线掩模的新方法
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.503385
S.X. Kang, H. Kang, A. Grilli, A. Arco
{"title":"A new method for high aspect X-ray mask fabrication","authors":"S.X. Kang, H. Kang, A. Grilli, A. Arco","doi":"10.1109/ICSICT.1995.503385","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503385","url":null,"abstract":"High aspect X-ray mask has been fabricated using electron beam lithography and x-ray lithography. Results show that 0.1 /spl mu/m patterns with aspect up to 12 were successfully obtained. Processes were described.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125369092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Tiger: a timing-driven gate array and standard cell layout system Tiger:时序驱动门阵列和标准单元布局系统
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.500159
Xianlong Hong, Yici Cai, Changge Qiao, P. Huang, Zhiwei Kang, T. Xue, E. Kuh, Chung-Kuan Cheng
{"title":"Tiger: a timing-driven gate array and standard cell layout system","authors":"Xianlong Hong, Yici Cai, Changge Qiao, P. Huang, Zhiwei Kang, T. Xue, E. Kuh, Chung-Kuan Cheng","doi":"10.1109/ICSICT.1995.500159","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500159","url":null,"abstract":"In this paper, we present Tiger, a fast timing-driven layout system for gate array and standard cell design. It can complete whole layout process from placement to detailed routing. The timing issue is directly formulated and considered at every important stage of Tiger based on RC timing model. Several novel and efficient layout algorithms are used in Tiger. Experiments show that Tiger is much faster than TimberWolf 6.0. It guarantees the chip performance while achieving comparable chip area with TimberWolf.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125937268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Instability of field electron emission from FEA FEA场电子发射的不稳定性
Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI: 10.1109/ICSICT.1995.503329
Haibo Song, Qiong Li, Jingfang Xu, Xinfu Liu
{"title":"Instability of field electron emission from FEA","authors":"Haibo Song, Qiong Li, Jingfang Xu, Xinfu Liu","doi":"10.1109/ICSICT.1995.503329","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503329","url":null,"abstract":"The instability of silicon field emitter arrays (FEA) has been studied by measuring their current-voltage features. The morphology at the tip of emitter is decided by the equilibrium between the surface tension and electrostatic stress. The contaminant at the emitter surface plays a significant role in breaking the equilibrium between these two stresses, hence makes the micro-emitters grow quickly and initiates a catastrophic cathode vacuum arc.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125963020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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