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Proceedings of 1994 IEEE International Reliability Physics Symposium最新文献

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Effects of temperature and defects on breakdown lifetime of thin SiO/sub 2/ at very low voltages 温度和缺陷对超薄SiO/ sub2 /极低电压击穿寿命的影响
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307846
K. Schuegraf, C. Hu
{"title":"Effects of temperature and defects on breakdown lifetime of thin SiO/sub 2/ at very low voltages","authors":"K. Schuegraf, C. Hu","doi":"10.1109/RELPHY.1994.307846","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307846","url":null,"abstract":"This paper investigates the physics of voltage and temperature accelerated breakdown testing of silicon dioxide within the framework of an anode hole injection model which can predict low voltage (3.3 V and below) breakdown lifetime. The field acceleration rate is shown to be independent of temperature, while the reduction of oxide breakdown lifetime at increased temperature is due to the oxide's enhanced susceptibility to damage caused by the holes' transport through the oxide. This paper also investigates defect related breakdown, showing that defects can be mathematically modeled as effective thinning even for aggressively scaled oxides. The effective thickness statistic derived from ramp breakdown or high-field lifetime or charge-to-breakdown tests enables determination of the oxide integrity of a specific oxide technology. For 3.3 Volt operation, an oxide technology must provide an effective thickness of 44 /spl Aring/; for 2.5 Volt operation, 34 /spl Aring/.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134405150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 87
Accurate, predictive modeling of soft error rate due to cosmic rays and chip alpha radiation 由于宇宙射线和芯片α辐射的软错误率的准确，预测建模
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307864
G. Srinivasan, P. Murley, H.H.K. Tang
{"title":"Accurate, predictive modeling of soft error rate due to cosmic rays and chip alpha radiation","authors":"G. Srinivasan, P. Murley, H.H.K. Tang","doi":"10.1109/RELPHY.1994.307864","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307864","url":null,"abstract":"We report here the development of a unique and comprehensive computer program (SEMM) to calculate the probability of soft fails in integrated circuits due to alpha particles emanating from the chip materials and due to terrestrial cosmic rays. This model treats all failure modes on an event by event basis allowing for all nuclear reactions and pulse shape effects. It is a three-dimensional design tool that takes the detailed chip layout and profile information to compute the soft error rate and is used without any parameter fitting. SEMM has been extensively tested with hot sources, high energy proton beams, and high elevation cosmic ray tests. Applications of SEMM to bipolar and CMOS chips and considerations for building in reliability for radiation induced soft fails are also discussed.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"393 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131952166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 120
Flash EPROM disturb mechanisms 闪存EPROM干扰机制
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307820
C. Dunn, Ç. Kaya, T. Lewis, T. Strauss, J. Schreck, P. Hefley, M. Middendorf, Tamer San
{"title":"Flash EPROM disturb mechanisms","authors":"C. Dunn, Ç. Kaya, T. Lewis, T. Strauss, J. Schreck, P. Hefley, M. Middendorf, Tamer San","doi":"10.1109/RELPHY.1994.307820","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307820","url":null,"abstract":"Analyses have been performed on floating-gate avalanche-injection MOS transistor (FAMOS) devices which have been subjected to write/erase cycling, resulting in hole injection into the tunnel dielectric. Theoretical and experimental analysis of these devices have shown that the bits which exhibit fast erase due to these trapped holes are highly modulated by the field across the tunnel dielectric. Two distinct disturb mechanisms, one of which is heavily impacted by write/erase cycling, have been evaluated with regards to their field and temperature dependencies and empirical models have been developed for both mechanisms.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"121 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114004683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 56
Stress-induced low-level leakage mechanism in ultrathin silicon dioxide films caused by neutral oxide trap generation 中性氧化阱生成引起超薄二氧化硅薄膜应力诱发的低泄漏机理
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307841
M. Kimura, H. Koyama
{"title":"Stress-induced low-level leakage mechanism in ultrathin silicon dioxide films caused by neutral oxide trap generation","authors":"M. Kimura, H. Koyama","doi":"10.1109/RELPHY.1994.307841","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307841","url":null,"abstract":"Stress-induced low-level leakage current in ultrathin silicon dioxide films is correlated with neutral oxide trap generation based on first-order kinetics. The conduction mechanism is explained by Fowler-Nordheim tunneling from the leakage spot, generated at the cathode interface, to the neutral oxide trap level, lower in energy than the SiO/sub 2/ barrier height.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124574619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
High temperature stressing of SiC JFETs at 300/spl deg/C SiC jfet在300/spl℃下的高温应力
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307813
C. Scozzie, C. W. Tipton, W. DeLancey, J. McGarrity, F. B. McLean
{"title":"High temperature stressing of SiC JFETs at 300/spl deg/C","authors":"C. Scozzie, C. W. Tipton, W. DeLancey, J. McGarrity, F. B. McLean","doi":"10.1109/RELPHY.1994.307813","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307813","url":null,"abstract":"Silicon carbide is an important emerging semiconductor technology for high power and high temperature applications. Although many papers in the literature report some of the characteristics and advantages of various SiC devices, very little information is available on the test and operation of these devices for an extended period of time. For our study a special lot of SiC JFETs was fabricated and packaged by CREE Research Inc. These devices were delivered to the Army Research Laboratory where they have been electrically characterized, radiation tested and, as reported here, subjected to thermal stress at 300/spl deg/C for 1000 hours under various bias conditions.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116924084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Influence of BiCMOS processing steps on thin gate oxide quality BiCMOS工艺步骤对薄栅氧化物质量的影响
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307830
S. Whiston, B. Stakelum, M. O’Neill, W. Lane
{"title":"Influence of BiCMOS processing steps on thin gate oxide quality","authors":"S. Whiston, B. Stakelum, M. O’Neill, W. Lane","doi":"10.1109/RELPHY.1994.307830","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307830","url":null,"abstract":"This paper reports on the work carried out on the improvement of gate oxide quality on a 1.0 /spl mu/m BICMOS process. The gate oxide defectivity was improved by partitioning the process into key process blocks and examining the contribution of each block to the overall defect level. Case studies from each block are presented which describe the weaknesses identified and the solutions implemented which have resulted in a robust and manufacturable process. A short loop process monitor is also described.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122770433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Enhancing reliability of CMOS devices using electrical techniques and electron spin resonance spectroscopy 利用电学技术和电子自旋共振光谱提高CMOS器件的可靠性
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307805
H. Evans, R. Lowry, W. L. Schultz, J. Morthorst, P. Lenahan, J. Conley
{"title":"Enhancing reliability of CMOS devices using electrical techniques and electron spin resonance spectroscopy","authors":"H. Evans, R. Lowry, W. L. Schultz, J. Morthorst, P. Lenahan, J. Conley","doi":"10.1109/RELPHY.1994.307805","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307805","url":null,"abstract":"Excessive failures due to threshold voltage shifts impacted the reliability of a CMOS analog comparator circuit. These shifts were attributed to a process-induced neutral hole trap. Electrical techniques were used to verify the model and determine the root cause. This work showed the need for a low cost technique for early defect detection which could be utilized during process development or as a process monitor. The method of electron spin resonance (ESR) was found to confirm the electrical results of this study. ESR is being developed as a diagnostic tool for improving product reliability.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133486110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electromigration characteristics of high-temperature sputtered Al-alloy metallization 高温溅射铝合金金属化的电迁移特性
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307838
Kunihiko Hashimoto, K. Touchi, H. Onoda
{"title":"Electromigration characteristics of high-temperature sputtered Al-alloy metallization","authors":"Kunihiko Hashimoto, K. Touchi, H. Onoda","doi":"10.1109/RELPHY.1994.307838","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307838","url":null,"abstract":"Electromigration (EM) characteristics have been investigated in the TiN/Al-alloy/TiN systems formed with two types of high-temperature sputtered Al-alloy metallizations. The Al-alloy films were prepared with and without a Ti glue layer before Al-Si-Cu film high temperature-sputter deposition. Using the Ti glue layer, an Al-Ti-Si product layer having a resistivity of 43 /spl muspl Omega/cm, instead of giant Si precipitates, grew during interfacial reaction between the Ti film and the growing Al-Si-Cu film. As the result, a bilayer structure of Al-alloy/Al-TiSi product was formed on the TiN layer. The EM resistance was drastically improved using the Ti underlayer. The high quality of the Al-alloy film (the increase in {111} orientation and the decrease in the standard deviation of the grain distribution) as well as the absence of Si precipitates will contribute to the suppression of void formation. Moreover, the EM-induced failure proceeds gradually because the Al-Ti-Si product layer will act effectively as a current bypass. This effect is supported by good electrical characteristics of the Al-Ti-Si product layer and the interface between the Al-alloy layer and the product layer. The local temperature increase is not essential to the subsequent growth of voids in the high-temperature sputtered Al-alloy metallization with the Ti glue layer.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130050977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Gate oxide thickness effect on hot carrier reliability in 0.35 /spl mu/m NMOS device 栅极氧化物厚度对0.35 /spl mu/m NMOS器件热载流子可靠性的影响
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307858
S. Aur, R. Chapman
{"title":"Gate oxide thickness effect on hot carrier reliability in 0.35 /spl mu/m NMOS device","authors":"S. Aur, R. Chapman","doi":"10.1109/RELPHY.1994.307858","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307858","url":null,"abstract":"The purpose of this paper is to study nMOS hot carrier reliability dependence on gate oxide thickness in 0.35 /spl mu/m devices. It is found that the gate oxide thickness effect in 0.35 /spl mu/m NMOS is primarily due to channel inversion charge difference and not due to smaller mobility degradation in thinner oxide as previously reported for 0.8 /spl mu/m NMOS.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"225 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114597022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Interface diffusion during electromigration in Al lines Al线电迁移过程中的界面扩散
Proceedings of 1994 IEEE International Reliability Physics Symposium Pub Date : 1994-04-11 DOI: 10.1109/RELPHY.1994.307825
R. Augur
{"title":"Interface diffusion during electromigration in Al lines","authors":"R. Augur","doi":"10.1109/RELPHY.1994.307825","DOIUrl":"https://doi.org/10.1109/RELPHY.1994.307825","url":null,"abstract":"Significant diffusion has been observed at the interface between Al and Al-oxide, during electromigration under conditions where grain boundary diffusion is traditionally thought to dominate. Voids form by localized Al thinning. These voids closely resemble those previously attributed to grain boundary diffusion. This has been studied by SEM, electron back-scattered (Kikuchi) diffraction and atomic force microscopy.<<ETX>>","PeriodicalId":276224,"journal":{"name":"Proceedings of 1994 IEEE International Reliability Physics Symposium","volume":"207 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131976411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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