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2014 44th European Solid State Device Research Conference (ESSDERC)最新文献

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Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowires 用最先进的硅纳米线实现的基于ttfet的6T SRAM电池的分析
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948815
S. Strangio, P. Palestri, D. Esseni, L. Selmi, F. Crupi
{"title":"Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowires","authors":"S. Strangio, P. Palestri, D. Esseni, L. Selmi, F. Crupi","doi":"10.1109/ESSDERC.2014.6948815","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948815","url":null,"abstract":"Tunnel-FETs are studied in a mixed device/circuit simulation environment. Model parameters calibrated on experimental DC as well as pulsed characterizations are then used for 6T SRAM cells investigation. Issues concerning fabricated devices, as the ambipolarity and the uni-directionality, are addressed at both device and circuit levels. Our results suggest that ambipolarity needs to be solved through device engineering and/or fabrication process improvements, while issues related to uni-directionality may be mitigated with a proper circuit design.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129558923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Variability in device degradations: Statistical observation of NBTI for 3996 transistors 器件退化的可变性:3996晶体管NBTI的统计观察
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948799
H. Awano, Masayuki Hiromoto, Takashi Sato
{"title":"Variability in device degradations: Statistical observation of NBTI for 3996 transistors","authors":"H. Awano, Masayuki Hiromoto, Takashi Sato","doi":"10.1109/ESSDERC.2014.6948799","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948799","url":null,"abstract":"Degradations of thousands of transistors have been observed in a practical time. A novel device array circuit suitable for measurement-based statistical characterization has been devised to facilitate parallel stress bias application to capture negative bias temperature instability (NBTI). The experimental results show that log-normal distributions approximate the distribution of power-law exponents very well and that the variation in magnitude of threshold voltage shifts bears an inverse relation to the channel areas of transistors. The variability in degradations under an AC-stress condition is also presented for the first time.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"2008 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129674789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Bimetallic nanoparticles for optimizing CMOS integrated SnO2 gas sensor devices 用于优化CMOS集成SnO2气体传感器器件的双金属纳米颗粒
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948762
G. Mutinati, E. Brunet, O. Yurchenko, E. Laubender, G. Urban, A. Köck, S. Steinhauer, J. Siegert, K. Rohracher, F. Schrank, M. Schrems
{"title":"Bimetallic nanoparticles for optimizing CMOS integrated SnO2 gas sensor devices","authors":"G. Mutinati, E. Brunet, O. Yurchenko, E. Laubender, G. Urban, A. Köck, S. Steinhauer, J. Siegert, K. Rohracher, F. Schrank, M. Schrems","doi":"10.1109/ESSDERC.2014.6948762","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948762","url":null,"abstract":"We present gas sensor devices based on ultrathin SnO2 films, which are integrated on CMOS fabricated micro-hotplate (μhp) chips. Bimetallic nanoparticles (NPs) such as PdAu, PtAu, and PdPt have been synthesized for optimizing the sensing performance of these sensors. We demonstrate that functionalization of nanocrystalline SnO2 gas sensing films with PdAu-NPs leads to a strongly improved sensitivity to the toxic gas carbon monoxide (CO) while the cross sensitivity to humidity is almost completely suppressed. We conclude that specific functionalization of CMOS integrated SnO2 thin film gas sensors with different types of NPs is a powerful strategy towards sensor arrays capable for distinguishing several target gases. Such CMOS integrated arrays are highly promising candidates for realizing smart multi-parameter sensing devices for the consumer market.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"214 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127144804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Silicon LEDs in FinFET technology 硅led在FinFET技术
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948813
G. Piccolo, P. Kuindersma, L. Ragnarsson, R. Hueting, N. Collaert, J. Schmitz
{"title":"Silicon LEDs in FinFET technology","authors":"G. Piccolo, P. Kuindersma, L. Ragnarsson, R. Hueting, N. Collaert, J. Schmitz","doi":"10.1109/ESSDERC.2014.6948813","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948813","url":null,"abstract":"We present what to our best knowledge is the first forward operating silicon light-emitting diode (LED) in fin-FET technology. The results show near-infrared (NIR) emission around 1100 nm caused by band-to-band light emission in the silicon which is uniformly distributed across the lowly doped active light-emitting area. We also propose further improvements to exploit the full potential of this structure.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121837049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
3-D compact model for nanoscale junctionless triple-gate nanowire MOSFETs 纳米级无结三栅极纳米线mosfet的三维紧凑模型
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948809
T. Holtij, M. Graef, A. Kloes, B. Iñíguez
{"title":"3-D compact model for nanoscale junctionless triple-gate nanowire MOSFETs","authors":"T. Holtij, M. Graef, A. Kloes, B. Iñíguez","doi":"10.1109/ESSDERC.2014.6948809","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948809","url":null,"abstract":"A 3-D analytical and physics-based compact model for extremely scaled junctionless (JL) triple-gate nanowire (TG-NW) MOSFETs is presented. Based on Poisson's equation and the conformal mapping technique, a compact solution for the electrostatics is derived in 3-D. A current expression is presented, which is continuous in all regions of device operation, and which takes into account the specific behavior of JL transistors. The model is compared versus measurement and simulated data of JL TG-NW MOSFETs, whereby the structural model parameters equal the values given by the fabricated devices. Important electrical parameters, such as threshold voltage VT, drain-induced barrier lowering (DIBL) and subthreshold slope S are worked out.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131152170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Experimental demonstration of improved analog device performance in GAA-NW-TFETs 改进gaa - nw - tfet模拟器件性能的实验证明
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948789
C. Schulte-Braucks, S. Richter, L. Knoll, L. Selmi, Qing-Tai Zhao, S. Mantl
{"title":"Experimental demonstration of improved analog device performance in GAA-NW-TFETs","authors":"C. Schulte-Braucks, S. Richter, L. Knoll, L. Selmi, Qing-Tai Zhao, S. Mantl","doi":"10.1109/ESSDERC.2014.6948789","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948789","url":null,"abstract":"We present experimental data on analog device performance of p-type planar and gate all around (GAA) nanowire (NW) Tunnel-FETs (TFETs). 10 nm diameter GAA-NW-TFETs reach a maximum transconductance efficiency of 12.7V-1 which is close to values obtained from simulations. A significant improvement of the analog performance by enhancing the electrostatics from planar TFETs to GAA-NW-TFETs with diameter of 20 nm and 10 nm is demonstrated. A maximum transconductance of 122 μS/μm and on-current up to 23 μ A/μm at a gate overdrive of Vgt = Vd = -1 V were achieved for the GAA-NW-TFETs. Furthermore a good output current-saturation is observed leading to high intrinsic gain up to 217 which is even higher than in 20 nm FinFETs.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127616761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Efficient numerics for thermally-assisted trap-limited conduction in chalcogenides 硫族化合物中热辅助阱限制传导的有效数值
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948774
E. Piccinini, M. Rudan, F. Buscemi, R. Brunetti
{"title":"Efficient numerics for thermally-assisted trap-limited conduction in chalcogenides","authors":"E. Piccinini, M. Rudan, F. Buscemi, R. Brunetti","doi":"10.1109/ESSDERC.2014.6948774","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948774","url":null,"abstract":"The hydrodynamic model for the trap-limited conduction regime in amorphous materials, used in the description of phase-change memory devices, is re-examined from the viewpoint of numerical efficiency. Among other features, the approach presented here avoids the calculation of integrals involving the distribution function during the iterative solution, and makes the proposed solution scheme suitable for incorporation into general-purpose device simulators.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133720606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration 隧道场效应管的变化行为源于源区掺杂浓度和通道边缘结构
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948814
S. Migita, T. Matsukawa, T. Mori, K. Fukuda, Y. Morita, W. Mizubayashi, K. Endo, Yongxun Liu, S. O'Uchi, M. Masahara, H. Ota
{"title":"Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration","authors":"S. Migita, T. Matsukawa, T. Mori, K. Fukuda, Y. Morita, W. Mizubayashi, K. Endo, Yongxun Liu, S. O'Uchi, M. Masahara, H. Ota","doi":"10.1109/ESSDERC.2014.6948814","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948814","url":null,"abstract":"Tunnel-FETs (TFETs) and MOSFETs are fabricated on a single SOI substrate using the same device parameters and process conditions, and the variation behavior of TFETs is studied by highlighting the difference with MOSFETs. It is found that the variation behavior characteristic to TFET is mainly caused by two factors. One is the dopant concentration at source region. It seems to affect to the uniformity of tunneling current along the channel width. A heavier source concentration is necessary to suppress the variation. Another factor is the channel edge configuration. Electric fields are easily concentrated at channel edge regions, and it lowers the threshold voltage of TFETs locally. It brings about an asymmetric variation behavior. Suppression of these factors is indispensable for the integration of TFET circuits.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134274350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Investigation on multiple activation energy of retention in charge trapping memory using self-consistent simulation 用自洽模拟研究电荷捕获存储器中保留的多重活化能
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948755
Sangyong Park, Seongwook Choi, Kwang Sun Jun, Huijung Kim, Sungman Rhee, Y. Park
{"title":"Investigation on multiple activation energy of retention in charge trapping memory using self-consistent simulation","authors":"Sangyong Park, Seongwook Choi, Kwang Sun Jun, Huijung Kim, Sungman Rhee, Y. Park","doi":"10.1109/ESSDERC.2014.6948755","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948755","url":null,"abstract":"Non-Arrhenius behavior has been reported in a various temperature range for the retention time of CT Flash memories. In order to understand the physical origin of the multiple activation energy due to the non-Arrhenius behavior, we conduct a simulation study using a 3D self-consistent numerical simulator developed in-house. As a result, it is found that both vertical and lateral charge transport in the conduction band of nitride layer are responsible for the non-Arrhenius retention characteristic. Also, the tunneling current through the bottom oxide and a lifetime criteria are turned out to be the key parameters which determine the multiple activation energy.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133716852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Impact of Off State Stress on advanced high-K metal gate NMOSFETs 关断状态应力对先进高k金属栅nmosfet的影响
2014 44th European Solid State Device Research Conference (ESSDERC) Pub Date : 2014-11-06 DOI: 10.1109/ESSDERC.2014.6948836
A. Spessot, M. Aoulaiche, M. Cho, J. Franco, T. Schram, R. Ritzenthaler, B. Kaczer
{"title":"Impact of Off State Stress on advanced high-K metal gate NMOSFETs","authors":"A. Spessot, M. Aoulaiche, M. Cho, J. Franco, T. Schram, R. Ritzenthaler, B. Kaczer","doi":"10.1109/ESSDERC.2014.6948836","DOIUrl":"https://doi.org/10.1109/ESSDERC.2014.6948836","url":null,"abstract":"In this work we have investigated the impact of Off State Stress (OSS) on nMOSFETs in High-K/Metal Gate (HKMG) technology. Although in standard poly-SiO2/SiON devices the impact of OSS is relatively limited and causes an increase in VTH, in the case of HKMG larger degradation is observed, with negative VTH shift. A significant increase of the device Off state leakage is observed, causing a serious issue for high voltage and low power oriented circuits.","PeriodicalId":262652,"journal":{"name":"2014 44th European Solid State Device Research Conference (ESSDERC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115154447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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