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2010 53rd IEEE International Midwest Symposium on Circuits and Systems最新文献

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Double diode modeling of time/temperature induced degradation of solar cells 时间/温度诱导太阳能电池退化的双二极管建模
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548809
P. Junsangsri, F. Lombardi
{"title":"Double diode modeling of time/temperature induced degradation of solar cells","authors":"P. Junsangsri, F. Lombardi","doi":"10.1109/MWSCAS.2010.5548809","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548809","url":null,"abstract":"This paper presents a simulation-based analysis of degradation of a solar cell as induced by temperature and/or time. Based on the double diode model (DDM) and using HSPICE, relationships are found between the parameters of the equivalent electrical circuit and efficiency, process variations and optimization in its operation. The results of this paper show that time, temperature and irradiance are of significance in DDM, because they affect the efficiency of a solar cell when degradation occurs.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127240926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
SIDO buck converter with independent outputs 具有独立输出的SIDO降压转换器
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548555
H. Eachempatti, S. Ganta, J. Silva-Martínez, H. Martínez-García
{"title":"SIDO buck converter with independent outputs","authors":"H. Eachempatti, S. Ganta, J. Silva-Martínez, H. Martínez-García","doi":"10.1109/MWSCAS.2010.5548555","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548555","url":null,"abstract":"The portable electronics market is rapidly migrating towards more compact devices requiring multiple high-integrity high-efficiency voltage supplies for empowering the systems. This paper demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3V. The main target is low cross regulation between the two outputs to supply independent load current levels while maintaining desired output voltage values well within a ripple that is set by adaptive hysteresis levels. A reverse current detector to avoid negative current flowing through the inductor prevents efficiency degradation at light load.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125517218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Systematic mixed even- and odd-mode modeling of parallel tightly coupled transmission lines 并联紧耦合输电线路的系统混合奇偶模建模
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548585
K. Murakami
{"title":"Systematic mixed even- and odd-mode modeling of parallel tightly coupled transmission lines","authors":"K. Murakami","doi":"10.1109/MWSCAS.2010.5548585","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548585","url":null,"abstract":"Systematic mixed even- and odd-mode modeling for analyzing parallel tightly coupled transmission lines is presented. This coupled line model is composed of even- and odd-mode equivalent lines. And, the numerical approach is based on the modified central difference (MCD) method. The voltage and current waves propagating along the parallel tightly coupled transmission lines are monitored by the time domain analysis method. For verification of the proposed modeling, a five-section 3-dB parallel coupled line is demonstrated dynamically. In addition, the S-parameters obtained from the pulse responses are compared with those of the commercial simulator.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126428707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A quasi-power-gated low-leakage stable SRAM cell 一种准功率门控低漏稳定SRAM单元
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548705
P. Nair, S. Eratne, E. John
{"title":"A quasi-power-gated low-leakage stable SRAM cell","authors":"P. Nair, S. Eratne, E. John","doi":"10.1109/MWSCAS.2010.5548705","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548705","url":null,"abstract":"Leakage power dissipation and stability continues to be a major concern in deep-submicron SRAM cell design. In this paper, a quasi-power-gating approach that reduces the leakage power dissipation in an SRAM cell while maintaining stability is proposed. As compared to a standard 6-transistor SRAM, it consists of four additional NMOS transistors. In the active mode, the cell is activated by enabling two NMOS transistors in the pull-down path of the inverter. In the idle mode, a quasi-power-gating scheme is employed to reduce leakage by utilizing stack effect. It was found that this cell resulted in about 39.54 percent and 30.5 percent leakage power savings at a supply voltage value of 1V and 300mV respectively. A stability increase was also observed when compared to the standard non-power-gated 6-transistor SRAM cell.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116917706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Design techniques for remote frequency calibration of passive wireless microsystems 无源无线微系统的远程频率校准设计技术
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548665
F. Yuan
{"title":"Design techniques for remote frequency calibration of passive wireless microsystems","authors":"F. Yuan","doi":"10.1109/MWSCAS.2010.5548665","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548665","url":null,"abstract":"This paper provides an overview and in-depth examination of the state-of-the-art of remote frequency calibration of the system clock of passive wireless microsystems. Frequency calibration using the carrier and the envelope of received RF signals, frequency calibration using injection-locked division, carrier injection-locking, digital trimming, envelope injection-locking with integrating feedback are investigated. The advantages and design constraints of each frequency calibration method are examined in detail. The performance of these frequency calibration methods are compared.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131258629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variable step-size based online acoustic feedback neutralization in multiple-channel ANC systems 多通道ANC系统中基于变步长的在线声反馈中和
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548834
M. Akhtar, W. Mitsuhashi
{"title":"Variable step-size based online acoustic feedback neutralization in multiple-channel ANC systems","authors":"M. Akhtar, W. Mitsuhashi","doi":"10.1109/MWSCAS.2010.5548834","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548834","url":null,"abstract":"This paper investigates the issue of acoustic feedback in multichannel active noise control (ANC) systems. The presence of acoustic feedback degrades the performance of the ANC systems, and in the worst case the ANC system may become unstable. Previously we have proposed a simplified method for acoustic feedback path modeling and neutralization (FBPMN) during the online operation of multichannel ANC systems. The computational complexity of the proposed method is lower than the existing method. Here we introduce an intuition based variable step-size (VSS) parameter, for LMS algorithm of FBPMN filter. This VSS is motivated from the fact that the error signal of FBPMN filter contains a disturbance-component that is decreasing in nature. Computer simulations are carried out for a 1×2×2 system comprising one reference microphone, two secondary loudspeakers and two error microphones. It is demonstrated that the proposed method achieves better performance than the existing method.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132860710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Alias minimization of 1-D signals using DCT based learning 基于DCT学习的一维信号混叠最小化
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548852
Prashant Garg, M. Maheshwari, Sameer Dubey, M. Joshi, Vijaykumar Chakka, A. Banerjee
{"title":"Alias minimization of 1-D signals using DCT based learning","authors":"Prashant Garg, M. Maheshwari, Sameer Dubey, M. Joshi, Vijaykumar Chakka, A. Banerjee","doi":"10.1109/MWSCAS.2010.5548852","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548852","url":null,"abstract":"In this paper, we propose a learning based approach for alias minimization of 1-D signals. Given an under-sampled test speech signal and a training set consisting of several speech signals each of which are under-sampled as well as sampled at greater than Nyquist rate, we estimate the non-aliased frequencies for the test signal using the training set. The learning of non-aliased frequencies corresponds to estimating them using a training set. The test signal and each of the under-sampled training set signal are first interpolated to the size of The non-aliased signals. They are then divided into a number of segments and discrete cosine transform (DCT) is computed for each segment. Assuming that the lower frequencies are non-aliased and minimally distorted, we replace the aliased DCT coefficients of the test signal with the best search from the training set. The non-aliased test signal is then re-constructed by taking the inverse DCT. The comparison with the standard interpolation technique in terms of both subjective and quantitative analysis indicates better performance.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134466373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A modular approach to multidimensional wave digital modeling of passive PDEs 无源偏微分方程多维波数字建模的模块化方法
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548837
Christiane Leuer, K. Ochs
{"title":"A modular approach to multidimensional wave digital modeling of passive PDEs","authors":"Christiane Leuer, K. Ochs","doi":"10.1109/MWSCAS.2010.5548837","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548837","url":null,"abstract":"In order to emulate a passive physical system with the wave digital concept, one has to find a reference circuit that is not only internally multidimensionally passive, but also suited for an element-wise transfer into a realizable and efficient wave digital structure. We present a modular approach that systemizes the derivation of an optimized reference circuit for a special class of linear hyperbolic PDEs. As an illustrative example, we deduce a wave digital structure for Navier's equation from linear elastodynamics.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133917921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Simple low voltage, low power implementations of circuits for VT extraction 简单的低电压、低功耗实现VT提取电路
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548857
J. Ramírez-Angulo, Venkata Sailaja Kasaraneni, R. Carvajal, A. López-Martín
{"title":"Simple low voltage, low power implementations of circuits for VT extraction","authors":"J. Ramírez-Angulo, Venkata Sailaja Kasaraneni, R. Carvajal, A. López-Martín","doi":"10.1109/MWSCAS.2010.5548857","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548857","url":null,"abstract":"Two simple implementations of circuits to extract V<inf>T</inf> are introduced. They are independent of body effect and operate on a single supply voltage V<inf>DD</inf> of less than two gate-source drops. Experimental and simulation results verify the circuit operation with a power dissipation P=60µA and with single supply V<inf>DD</inf>=1.4V in 0.5µm CMOS technology and with variations of the extracted threshold voltage of less than 0.2mV for V<inf>DD</inf> changing from 1.4V to 2.5V.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"279 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122689182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A low phase noise, wide range QVCO for MICS, and ISM applications 低相位噪声，适用于MICS和ISM应用的宽范围QVCO
2010 53rd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2010-08-16 DOI: 10.1109/MWSCAS.2010.5548885
N. Haghighi, K. Raahemifar
{"title":"A low phase noise, wide range QVCO for MICS, and ISM applications","authors":"N. Haghighi, K. Raahemifar","doi":"10.1109/MWSCAS.2010.5548885","DOIUrl":"https://doi.org/10.1109/MWSCAS.2010.5548885","url":null,"abstract":"A Quadrature Voltage Controlled Oscillator (QVCO) has been designed and simulated at 0.18µm technology, 1.8 V supply voltage. The design is aimed for MICS/ ISM devices. The design offers a small size, low power consumption, low phase noise, and wide frequency range (200-827 MHz) of operation. The obtained phase noise (at 37° C) @ 160 KHz offset for 404.7 MHz oscillation is −100dBc/Hz and for 433 MHz oscillation at 160KHZ offset is at −99.5 dBc/Hz with 0.9mW power consumption.","PeriodicalId":245322,"journal":{"name":"2010 53rd IEEE International Midwest Symposium on Circuits and Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123862536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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