Simple low voltage, low power implementations of circuits for VT extraction

J. Ramírez-Angulo, Venkata Sailaja Kasaraneni, R. Carvajal, A. López-Martín
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引用次数: 1

Abstract

Two simple implementations of circuits to extract VT are introduced. They are independent of body effect and operate on a single supply voltage VDD of less than two gate-source drops. Experimental and simulation results verify the circuit operation with a power dissipation P=60µA and with single supply VDD=1.4V in 0.5µm CMOS technology and with variations of the extracted threshold voltage of less than 0.2mV for VDD changing from 1.4V to 2.5V.
简单的低电压、低功耗实现VT提取电路
介绍了两种提取VT的简单电路实现。他们是独立的体效应和工作在一个单一的电源电压VDD小于两个栅极源下降。实验和仿真结果验证了该电路在功耗P=60µa、单电源VDD=1.4V、0.5µm CMOS技术下的工作原理,以及VDD从1.4V到2.5V时提取的阈值电压变化小于0.2mV。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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