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2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)最新文献

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Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme 采用4-FSK调制方案的皮质神经记录植入物无线接口
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440288
M. Sendi, Mohsen Judy, H. Molaei, A. M. Sodagar, M. Sharifkhani
{"title":"Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme","authors":"M. Sendi, Mohsen Judy, H. Molaei, A. M. Sodagar, M. Sharifkhani","doi":"10.1109/ICECS.2015.7440288","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440288","url":null,"abstract":"This paper used a 4-level Frequency Shift Keying (4-FSK) modulation scheme to enhance the density of wireless data transfer from implantable biomedical microsystems to the outside world. Modeling and simulation of the wireless channel for 4-FSK modulation in the case of a neural recording implant has been done. To realize the 4-FSK scheme, the modulator and demodulator circuits are proposed, designed and simulated in a 0.18-μm CMOS process, and in the 174-216 MHz frequency band at a data rate of 13.5 Mbps. Operated using a 1.8 V supply voltage, the modulator circuit consumes a power of 7.8 μW.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130663164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Metal oxide films/structures for gamma radiation detection 伽马辐射探测用金属氧化物薄膜/结构
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440409
A. Omar, A. Baraka, A. Zaki, K. Sharshar
{"title":"Metal oxide films/structures for gamma radiation detection","authors":"A. Omar, A. Baraka, A. Zaki, K. Sharshar","doi":"10.1109/ICECS.2015.7440409","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440409","url":null,"abstract":"In this work, aluminum oxide, nickel oxide films were prepared for the purpose of gamma radiation dosimetry using several deposition techniques. A significant change in the (I-V) measurements for the as deposited films, p-n junction film structures have been observed upon exposure to high and low gamma radiation doses which proofs the promising characteristics of these oxide films for gamma radiation dosimetry applications.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132409950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Solving constraints in FPGA detailed routing using SMT 利用SMT求解FPGA详细路由约束
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440391
M. Safar, A. Salem
{"title":"Solving constraints in FPGA detailed routing using SMT","authors":"M. Safar, A. Salem","doi":"10.1109/ICECS.2015.7440391","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440391","url":null,"abstract":"In this paper, we present a new approach for solving the FPGA detailed routing problem using Satisfiability Modulo Theories (SMT). SMT allows problem formulation in richer first-order logic fragments. The detailed routing constraints are directly mapped to a chain of the standard SMT-LIB2 assertions of equality and inequality predicates. The SMT formulation eliminates the need to encode the net track segments into Boolean variables and to decode the routing solution. Moreover, it is independent of the channel width. Using SMT assertion stack capabilities, the detailed routing problem can be explored for various FPGA architecture models with different routing resources capabilities without the need to reformulate the whole constraints. SMT capability for solving objective functions is utilized to find the optimal minimum channel width. Experimental results show that the proposed SMT-based approach provides higher modeling flexibility and execution speedup compared to the SAT-based approach.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126722208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 1V low-power low-noise biopotential amplifier based on flipped voltage follower 一种基于翻转电压跟随器的1V低功率低噪声生物电位放大器
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440373
Tamer Farouk, M. Elkhatib, M. Dessouky
{"title":"A 1V low-power low-noise biopotential amplifier based on flipped voltage follower","authors":"Tamer Farouk, M. Elkhatib, M. Dessouky","doi":"10.1109/ICECS.2015.7440373","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440373","url":null,"abstract":"This paper presents a low-voltage low-power low-noise amplifier suitable for neural recording applications. Based on the flipped voltage follower (FVF) topology, the amplifier is able to operate under a 1 V supply by alleviating the tradeoff between the noise and the voltage headroom. A gm-cell was built using FVF, its effective transconductance is not a function of the bias current, so the noise contribution of the output transistors can be decreased without increasing the bias current. This amplifier is designed and simulated in a 130 nm CMOS process. The amplifier consumes 2.2 μW from 1 V supply voltage. The input referred noise is 3.7 μVrms. The amplifier has a BW from 25 Hz to 9.9 kHz.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122574562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
6-Gb/s serial link transceiver for NoCs 用于noc的6gb /s串行链路收发器
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440339
Safaa A. Mohammed, S. Ibrahim, S. Habib
{"title":"6-Gb/s serial link transceiver for NoCs","authors":"Safaa A. Mohammed, S. Ibrahim, S. Habib","doi":"10.1109/ICECS.2015.7440339","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440339","url":null,"abstract":"This paper introduces the design of a 6-Gb/s serial link for the many core Cairo University SPARC processor. The proposed serial link consists of a serializer and a deserializer. The serializer contains an 8B/10B encoder, a 10:1 multiplexer, a pre-driver, and a driver. The deserializer contains a sampler, a 1:10 demultiplexer, and a 10B/8B decoder. The design is modeled using a digital 65-nm CMOS technology and 1.2-V supply. The use of serial links reduces the interconnect area of the network on chip by 93.96% relative to the design with parallel 32 bit data links. The traces between the cores are modeled using metal layer number eight achieving maximum tolerable clock skew between the transmitter and the receiver up to 49%. The link consumes 1.63 mW power (0.27 pJ/bit).","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114249573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Context awareness in UbiComp: An IoT oriented distributed architecture UbiComp中的上下文感知:面向物联网的分布式架构
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440372
R. Souza, J. Lopes, C. Geyer, C. Garcia, Patricia Davet, A. Yamin
{"title":"Context awareness in UbiComp: An IoT oriented distributed architecture","authors":"R. Souza, J. Lopes, C. Geyer, C. Garcia, Patricia Davet, A. Yamin","doi":"10.1109/ICECS.2015.7440372","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440372","url":null,"abstract":"The recent advances in the Internet of Things (IoT) area, which has provided an increasing availability of networked sensors and actuators, has given a new perspective to research in the context awareness in UbiComp. In this sense, the main contribution of this paper is the proposition of COIOT, an architecture for IoT designed with the aim of providing, through rules, the proactive management of the EXEHDA Middleware interactions with the physical environment. To evaluate the functionalities of the proposed architecture we implemented a case study in the agricultural area. The achieved results are promising.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"704 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116120541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Design and performance comparison of a superregenerative MPSK transceiver 超再生MPSK收发器的设计与性能比较
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440276
J. Bonet-Dalmau, Alexis Lopez-Riera, Pere Palà-Schönwälder, F. X. Moncunill-Geniz, Albert Babi-Oller
{"title":"Design and performance comparison of a superregenerative MPSK transceiver","authors":"J. Bonet-Dalmau, Alexis Lopez-Riera, Pere Palà-Schönwälder, F. X. Moncunill-Geniz, Albert Babi-Oller","doi":"10.1109/ICECS.2015.7440276","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440276","url":null,"abstract":"In this paper we present a superregenerative transceiver able to switch among BPSK, QPSK and 8PSK modulations. An HF-band proof-of-concept transceiver is implemented on an FPGA with a minimum of analog circuitry. The desire of making fair comparisons between BER figures rises a problem of clock frequency selection which is finally solved without consuming extra resources.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115261741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 1.6-nA quiescent current bandgap reference in 130-nm CMOS technology 1.3 nm CMOS技术中1.6 na静态电流带隙参考
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440366
Amr Kamel, S. Ibrahim
{"title":"A 1.6-nA quiescent current bandgap reference in 130-nm CMOS technology","authors":"Amr Kamel, S. Ibrahim","doi":"10.1109/ICECS.2015.7440366","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440366","url":null,"abstract":"This paper presents an ultra-low quiescent current bandgap reference. The BGR is based on a resistor-less topology to reduce area and current consumption. The proposed design was implemented in TSMC 130-nm CMOS technology. It only consumes 1.6 nA from a 1.8-V supply. The BGR provides about 770-mV reference voltage and has power supply rejection ratio (PSRR) of 57 dB at DC. The temperature coefficient (TC) is 5 ppm/°C from -40 to 125 °C. Process variation and mismatches are kept as low as 1.4% per sigma.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121359995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation 分析ADMM-LP算法进行LDPC解码，硬件实现的第一步
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440322
I. Debbabi, B. Gal, N. Khouja, F. Tlili, C. Jégo
{"title":"Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation","authors":"I. Debbabi, B. Gal, N. Khouja, F. Tlili, C. Jégo","doi":"10.1109/ICECS.2015.7440322","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440322","url":null,"abstract":"The recent interest in linear programming techniques for LDPC decoding showed that these methods are too complex for real applicability. Alternating direction method of multipliers is a classic technique in convex optimization theory. When applied to the linear programming decoding of LDPC codes, the ADMM algorithm acts as a message passing decoding method. In this work, we present a complexity analysis of the ADMM LDPC decoder compared with the sum product approach and we explain the parallelism levels that are explored in the ADMM algorithm. A software implementation by taking advantage of the architectural features of the multi-core processors parallelism is presented. The overall analysis provides a better understanding of the ADMM approach complexity which makes a start to possible hardware implementations.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123036761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Online bicast allocation algorithm for contention-free-routing NoCs 无争用路由noc在线双播分配算法
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440314
A. Ahmed, Salma Hesham, M. A. E. Ghany, D. Göhringer, K. Hofmann
{"title":"Online bicast allocation algorithm for contention-free-routing NoCs","authors":"A. Ahmed, Salma Hesham, M. A. E. Ghany, D. Göhringer, K. Hofmann","doi":"10.1109/ICECS.2015.7440314","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440314","url":null,"abstract":"The demand on network-on-chips (NoCs) with quality of service guarantees for real-time applications has been massively increasing in the last few years. One of the main techniques used for providing such networks is time-division-multiplexing (TDM) since it provides hard bandwidth and latency guarantees along with better resources utilization. In this paper, a runtime bicast algorithm is proposed for allocating the TDM slots in a contention-free-routing NoC. The proposed algorithm is evolved from a state-of-the art TDM allocation algorithm for point-to-point connections. The bicast algorithm shows merit in time-to-bandwidth efficiency for 80.12% of the total possible bicast connections with an average improvement of 37.76% compared with the unicast algorithm.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115056767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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